Showing papers on "Negative impedance converter published in 2001"

Frequency-dependent electrical transport in carbon nanotubes

Abstract: Carbon nanotubes exhibit exceptional dc electrical transport but relatively little is known about their ac behavior. We discover, in the ac impedance spectra of nanotubes, an intrinsic resonance at a fixed ultrasonic frequency of 37.6 kHz. In the 100 Hz to 8 MHz frequency range the overall impedance shows a negative capacitance associated with the dynamical response of the metal-nanotube contact. These effects could be used to compensate capacitance in electronic circuits or to fabricate nanotube-based transducers.

Methods to control the droop when powering dual mode processors and associated circuits

Abstract: A DC/DC converter (100) has a DAC (40) that receives a code associated with desired processor operating voltage and sets the reference voltage on its output (41). The reference voltage (VDAC) is boosted by the buffer amplifier (42) to center the droop along the median load. A sensed current signal ICS (22) is proportional to the load current IO (24) and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain GC. A droop control feedback circuit includes an error amplifier (50). It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPUmax and transformed to the current IDROOP (32) amplifier output. As a result, the output voltage of the converter (50) is inversely proportional to the load current and is invariant to the processor clock frequency changes associated with the processor mode switchover.

Programmable impedance control circuit

Abstract: Disclosed is a programmable impedance control circuit, comprising a voltage divider, the voltage divider comprising an MOS array supplied with a first voltage and an external resistance having an external impedance equal to N times said external resistance. The voltage divider outputs a second voltage. A reference voltage generator is provided for generating a third voltage corresponding to N/(N+M) times said first voltage as a reference voltage for said second voltage, and wherein M times internal impedance is used for N times external impedance (N=M or N≠M).

Impedance control circuit

Abstract: An impedance control circuit that reduces the impedance variance when an external impedance generated from an external resistor is matched to internal impedance. In one aspect, an impedance control circuit comprises an external resistor for establishing a first reference voltage; a comparator for comparing the first reference voltage with a second reference voltage and outputting an impedance corresponding to the result of the comparison; and a PMOS current source connected to a constant-voltage source and to the output of the comparator, wherein the PMOS current source generates a current that corresponds to the impedance of the comparator.

PWM controller having off-time modulation for power converter

Abstract: The present invention provides an off-time modulation in PWM controller to increase the switching period for saving power consumption in the light load and no load conditions. The off-time modulation is achieved by keeping the charge current as a constant and moderating the discharge current of the saw-tooth-signal generator of the PWM controller. Decreasing the discharge current increases the switching period. A feedback voltage, which is derived from the voltage feedback loop, is taken as an index. The discharge current is modulated to be a function of the feedback voltage. A threshold voltage defines the level of the light load condition. The differential of the feedback voltage and the threshold voltage is converted to a current, which is then amplified and turned into the discharge current. A limiter clamps the maximum discharge current to decide the switching period in normal load and full load conditions and determines the dead time of PWM signal. Once the decrement of feedback voltage is close to the threshold voltage, the discharge current will decrease and switching period will be expanded continuously. When the feedback voltage is lower than the threshold voltage, a minimum discharge current decides the maximum switching period. Keeping the maximum on-time as the constant and increasing the switching period by increasing the off-time prevent the magnetic components, such as inductors and transformer, from being saturated.

Current bandgap voltage reference circuits and related methods

Abstract: A bandgap voltage reference circuit and related method characterized in having a first current source for generating a first current having a positive temperature coefficient, a second current source for generating a second current having a negative temperature coefficient, and a resistive element to receive both the first and second current to develop a reference voltage. By configuring the circuit such that the magnitudes of the positive and negative temperature coefficients are substantially the same, the reference voltage becomes substantially invariant with changes in temperature. Another circuit is provided in conjunction with the voltage reference circuit to substantially equalize the drain-to-source voltage of the transistors used in the voltage reference circuit.

Digital-to-analog converter and active matrix liquid crystal display

Abstract: A digital-to-analog converter comprises a first converter stage 1 for converting the m most significant bits of a k bit input signal to upper and lower voltage limits VL and VH by selecting the appropriate low impedance reference voltages. A second converter stage 2 performs a linear conversion of the n least significant bits of the k bit input within the voltage range defined by the voltage limits VL and VH. A precharging circuit comprising switches SW 1 and SW 2 disconnects the stage 2 from the load C LOAD , which is charged to the voltage limit VL during a precharge phase. The load is subsequently disconnected from the voltage limit VL and connected to the output of the stage 2 to complete charging of the load C LOAD to the converter output voltage.

A CMOS-process compatible, tunable NDR (negative differential resistance) device and method of operating same

Abstract: An n-channel metal-insulator-semiconductor field-effect transistor (MISFET) that exhibits negative differential resistance in its output characteristic (drain current as a function of drain voltage) is disclosed. For a fixed gate voltage, the MISFET channel current, which flows between the drain and source terminals of the transistor, firstly increases as the drain-to-source voltage increases above zero Volts. Once the drain-to-source voltage reaches a pre-determined level, the current subsequently decreases with increasing drain-to-source voltage. In this region of operation, the device exhibits negative differential resistance, as the drain current decreases with increasing drain voltage. The drain-to-source voltage corresponding to the onset of negative differential resistance is also tunable. In addition, the drain current and negative differential resistance can be electronically tailored by adjusting the gate voltage. The resulting device can be incorporated into a number of useful applications, including as part of a memory device, a logic device, etc.

Using a negative capacitance to increase the tuning range of a varactor diode in MMIC technology

Abstract: An original method to increase the tuning range of a monolithic-microwave integrated-circuit (MMIC) varactor diode is presented in this paper. An active circuit simulating a negative capacitance is connected to the varactor diode. This method allows to increase the varactor's tuning range more than ten times and to compensate its series resistance at the same time. A MMIC simulating a negative capacitance have been successfully fabricated and measured. To the best of the authors' knowledge, this is the first realization of a MMIC simulating a negative capacitance.

DC-DC converter and storage apparatus

Abstract: A DC-DC converter includes N capacitors having identical capacitances, initially coupled in series, and supplied with an external power supply voltage to be charged thereby, and an circuit for coupling the N capacitors in parallel and varying a duty ratio of a charging timing, so as to vary an internal power supply voltage which is output from the DC-DC converter.

Preventing instability in DC distribution systems by using power buffering

Abstract: Negative incremental impedance of regulated converter loads can cause stability problems in distributed DC power systems. Since the load-side converters usually contain energy storage elements, it is possible to avoid instability through transient control of the load-side converter input impedance. In this paper, bus-side stability is used as a control constraint. It is shown that load-side converter control-loop gain can be modified to improve stability characteristics, or even actively controlled to meet given impedance specifications.

Passive underwater acoustic damping using shunted piezoelectric coatings

Abstract: In this technical note, the acoustic echo cancellations by a piezoelectric layer, coated to a rigid acoustic surface and shunted with various combinations of resistor, capacitor and inductor in series, have been investigated. A one-dimensional electro-acoustic model, enabling us to calculate the acoustic echo reduction for different shunting circuits, is established for the electrically shunted piezoelectric layer. It will be seen that shunting the piezoelectric layer with a resistor and an inductor can achieve good echo reduction only in a very narrow frequency bandwidth. In order to achieve broadband echo reduction, an inductor, a resistor and a capacitor in series shall be used. The formulae for calculating the inductance, resistance and capacitance of the shunting circuit have been derived. Numerical simulations show that the capacitance of the optimal shunting circuit can be negative for most commercial piezoelectric materials, although the inductance can be designed to be positive by adjusting the acoustic impedance of the piezoelectric materials. Realization of a capacitive circuit with negative capacitance has been proposed.

Input-current-shaper based on a modified SEPIC converter with low voltage stress

Abstract: The boost topology is often the designer's first choice when dealing with PFC front-ends. This topology is well documented in the literature and has obvious advantages like continuous input current and low voltage- and current-stress compared to other PFC topologies. The PFC SEPIC converter also has the advantage of the continuous input current but suffers from high voltage- and current stress. In this paper a modified SEPIC converter is presented with reduced voltage stress, comparable to that of the boost converter. Experimental result of a 200 W prototype for 185-270 V line voltage are also presented.

Frequency control circuit for unregulated inductorless DC/DC converters

Abstract: An unregulated inductorless direct current to direct current converter comprising a first voltage-to-current converter configured to convert a first voltage to a first current and a second voltage-to-current converter configured to convert a second voltage to a second current. A regulation circuit is coupled to the first and second voltage-to-current converters and configured to generate an output current proportional to the difference between the first and second currents. Also a variable frequency oscillator is coupled to the regulation circuit, the oscillator receiving as a control current the output current therefrom and outputting a clock signal having a frequency proportionate to the control current. The converter further comprises an output stage coupled to receive the clock signal and receiving an input voltage and outputting an output voltage, the output voltage and the input voltage having a ratio that is determined by the clock signal.

A converter device and a method for the control thereof

Abstract: In a device for converting alternating voltage into direct voltage and conversely having a series connection of at least four units (1-4) each comprising a semiconductor device (10-13) of turn-off type and a diode (14-17) connected in anti-parallel therewith between two poles of a direct voltage side, a flying capacitor (25) is connected between two outer midpoints (24, 26) between two units of the series connection, while the midpoint of the series connection is connected to an alternating voltage phase line (18). An arrangement (27) is adapted to control the units (1-4) depending upon the voltage measured across the flying capacitor and the direction of the current in the alternating voltage phase line for obtaining charging or discharging of the capacitor when achieving an intermediate level of a voltage pulse delivered on the phase output.

Power amplifier (PA) with improved power regulation

Abstract: A circuit for regulating the power provided to a load connected to an output of a power amplifier. The circuit includes an amplitude detector that outputs a voltage corresponding to the amplitude of the signal outputted by the power amplifier. This output voltage is a function of the impedance of the load. Thus, when the impedance of the load changes, the output voltage also changes. Given a constant current into the load, it is the load impedance that determines the power delivered to the load. Therefore, because the output voltage reflects changes in the impedance of the load, the output voltage can be used by a regulator circuit to maintain a constant output power, regardless of changes in the impedance of the load.

Method and apparatus for current controlled transient reduction in a voltage regulator

Abstract: A method and apparatus for substantially eliminating ripple and transient voltage using a current controlled voltage regulator. Current control ( 460 ) senses load current (i L ) changes and produces control voltage (V CONTROL ) in response to the load current changes. The control voltage increases the conductivity state of shunt transistor ( 470 ) such that any deficit of current caused by load changes at load ( 420 ) during a positive voltage transient is conducted through shunt transistor ( 470 ). The control voltage decreases the conductivity state of shunt transistor ( 470 ) such that any excessive current caused by load ( 420 ) during a negative voltage transient is balanced by the reduction of current in shunt transistor ( 470 ).

Reference voltage stabilization in CMOS sensors

Abstract: A reference voltage generator for use in an image sensor provides a reference voltage to an S/H block during a pixel read-out operation and another reference voltage to an analog-to-digital converter (ADC) during a digitization operation. The reference voltage generator includes a variable voltage generator, a sample-and-hold circuit to sample a reference voltage prior to the pixel read-out operation or the digitization operation, and a buffer amplifier to drive the appropriate reference voltage to the relatively high impedance load presented by the S/H block and the variable impedance load provided by the ADC.

Overvoltage protection device for buck converter

Abstract: An overvoltage protection device for use with a buck converter comprises a transistor switch coupled in series between an input voltage and a voltage switch of the buck converter for preventing the buck converter from outputting an excessive voltage as the voltage switch of the buck converter is short-circuited. A voltage detecting circuit is placed at the voltage output terminal of the buck converter for comparing the output voltage of the buck converter with a reference voltage to detect whether the output voltage exceeds a predetermined voltage level, and in response thereto, outputs a control signal to the PWM controller of the buck converter and the transistor switch. When the buck converter outputs an excessive voltage, the PWM controller is forced to shut down responsive to the control signal, and the transistor switch also turns off responsive to the control signal to cut off the energy of the buck converter.

On-chip substrate regulator test mode

Abstract: An on-chip circuit for defect testing with the ability to maintain a substrate voltage at a level more positive or more negative than a normal negative operating voltage level of the substrate. This is accomplished with a chain of MOSFETs that are configured to operate as a chain of resistive elements or diodes wherein each element in the chain may drop a portion of a supply voltage coupled to a first end the chain. The substrate is coupled to a second end of the chain. The substrate voltage level is essentially equivalent to the supply voltage level less the voltage drops across the elements in the diode chain. A charge pump maintains the substrate voltage level set by the chain. Performing chip testing with the substrate voltage level more negative than the normal negative voltage level facilitates detection of devices that will tend to fail only at cold temperatures. Performing chip testing with the substrate voltage level more positive than the normal negative voltage level facilitates detection of other margin failures and ion contamination.

High efficiency, low voltage to high voltage power converter

Abstract: A high efficiency power converter for generating a high voltage from a low voltage supply. The power converter includes a resonant circuit in electrical communication with the low voltage supply via a switch. The power converter further includes a control circuit in electrical communication with the switch and a resonant inductor of the resonant circuit. The control circuit is operative to open and close the switch in response to the current flowing through the resonant inductor. A transformer is connected parallel to the resonant inductor and is operative to generate the high output voltage from the voltage of the resonant inductor. In the preferred embodiment, the switch is closed at the point in time when the current in the resonant inductor passes zero. At this time, switching conditions within the switch are ideal such that any losses experienced by the switch are conduction losses thereby resulting in improved efficiency of the power converter.

Method and control system for voltage control at a converter station

Abstract: A converter station (STN 1, STN 2 ) having a voltage source converter (CON 1, CON 2 ) is coupled between a direct current link (W 1, W 2 ) and an alternating current network (N 1, N 2 ) in a high voltage direct current transmission system. A control system (CTRL 1, CTRL 2 ) for the converter station has means for control of active power flow (P) between the direct current link and the alternating current network by influencing the phase displacement (γ) between a bus voltage (UL 1, UL 2, UL) in the alternating current network and a bridge voltage (UV 1, UV 2, UV) of the voltage source converter. The control system comprises detection means ( 48 ) for generation of a phase change order signal (PCO) in response to an indication of an abnormal voltage condition at the direct current link, and means ( 49 ) for influencing the phase position of the bridge voltage in response to said phase change order signal, so as to ensure that the phase displacement between the bridge voltage and the bus voltage will result in an active power flow from the direct current link to the alternating current network.

Estimation of power supply harmonic impedance using a controlled voltage disturbance

Abstract: A novel method for power system impedance estimation is presented. The method employs a power converter to inject a voltage transient onto the supply system. The impedance is estimated through correlation of the measured voltage and current transients. Simulations and experimental results demonstrate the effectiveness of this measurement technique.

Method and device for active impedance matching

Abstract: Dynamic matching of a source impedance to a load impedance or the complex conjugate of the load impedance. An embodiment of the invention is a device for active impedance matching comprising a voltage driver having an output connected to a load, means for detecting an output current from the voltage driver to the load, means for scaling the detected output current by a scaling value, and means for subtracting a value representing the scaled detected output current from an input signal of the voltage driver. Another embodiment is a device for active impedance matching comprising a current driver having an output connected to a load, means for detecting an output voltage from the current driver to the load, means for scaling the detected output voltage by a scaling value, and means for subtracting a value representing the scaled detected output voltage from an input signal of the current driver.

Digital update scheme for adaptive impedance control of on-die input/output circuits

Abstract: An adaptive impedance matching arrangement has an adaptive impedance circuit and a control circuit. The adaptive impedance circuit matches the impedance of a bus and is controlled according to control bits supplied by the control circuit. The control bits are updated according to a signal indicating the state of a queue maintaining transactions for the bus.

Power line communication circuit

Abstract: A power line communication circuit (10) comprises a rectifier (20) connected to an a.c. power line utility source (12). The rectifier (20) draws power from the a.c. power source (12) and produces a low-frequency rectified d.c. voltage across its positive and negative output terminals with the negative output terminal (32) being referenced as a circuit ground. The rectified d.c. voltage signal is received by a voltage-to-current converter (38) connected to the positive output terminal (30) of the rectifier. The voltage-to-current converter (38) also receives a high-frequency a.c.-shaped communication input voltage signal from an external high-frequency a.c.-shaped communication signal generator. In response to the two input voltage signals, the voltage-to-current converter (38) generates an output current which contains a low frequency d.c. component from the rectified d.c. input voltage signal and a high frequency a.c.-shaped component from the a.c-shaped high frequency communication input voltage signal. The high frequency a.c.-shaped communication component is superimposed on the low frequency d.c. component to place communication data signals on the a.c. power line.

PWM converter system

Abstract: A single-phase PWM converter system in accordance with the present invention employs a sample-and-hold circuit which samples and holds a direct current in the state wherein one of two-phase gate signals of a positive or negative side arm is ON and the other phase is OFF, determines the sign of an output of the sample-and-hold circuit according to the two-phase gate condition, detects a phase current at the input side of the converter, and controls a voltage at the input side of the converter so that the detected current value agrees with a power supply current command. Further, a three-phase PWM converter system in accordance with the present invention detects the effective current and the ineffective current of the power supply current from the direct current, and based on the values, controls the PWM converter so that the sine wave power supply current whose power supply power factor is 1 is provided.

Bidirectional converter with input voltage control by a primary switch and output voltage regulation by a secondary switch

Abstract: A buck converter, boost converter or flyback converter is generally represented as a two-port having a primary side with a primary switching device (10; 38; 70; 98; 110), and a secondary side with a secondary switching device (20; 50; 80; 106). The primary switching device is controlled in such a way that the on-time is adapted to the voltage at the primary side of the converter. The relation between the on-time of the primary switching device and the primary voltage is a generally hyperbolic function.

Voltage-level converter

Abstract: A voltage level converter includes a static voltage level converter and a split-level output circuit coupled to the static voltage-level converter. In another embodiment, the voltage-level converter includes a static voltage level-converter, a first transistor, and a second transistor. The static voltage-level converter includes an input node, a first pull-up node, a second pull-up node, an inverter output node, and an output node. The first transistor is coupled to the input node and the first pull-up node. The second transistor is coupled to the second pull-up node and the inverter output node.