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Showing papers on "Transmission delay published in 1991"


Journal ArticleDOI
TL;DR: The influence of several variables on PRMA efficiency, defined as the number of conversations per channel, is examined and it is found that with 32-kb/s speech coding and 720- kb/s transmission (22.5 channels), PRMA supports up to 37 simultaneous conversations, or 1.64 conservations per channel.
Abstract: Packet-reservation multiple access (PRMA) is viewed as a merger of slotted ALOHA and time-division multiple access (TDMA). Dispersed terminals transmit packets of speech information to a central base station. When its speech activity detector indicates the beginning of a talkspurt, a terminal contends with other terminals for access to an available time slot. After the base station detects the first packet in the talkspurt, the terminal reserves future time slots for transmission of subsequent speech packets. The influence of several variables on PRMA efficiency, defined as the number of conversations per channel, is examined. The number of channels is the ratio of transmission rate to speech coding rate. It is found that with 32-kb/s speech coding and 720-kb/s transmission (22.5 channels), PRMA supports up to 37 simultaneous conversations, or 1.64 conservations per channel. The number of conversations per channel is at least 1.5 over a wide range of packet sizes (8 ms of speech per packet to 34 ms) and for all systems with 16 or more channels (transmission rate >or=512 kb/s, with 32-kb/s speech coding). Other factors studied are the sensitivity of the speech activity detector, the retransmission probability of the contention scheme, and the maximum time delay for the transmission of speech packets. >

433 citations


Book
02 Jan 1991
TL;DR: In this article, an analysis of the performance of a packet switch based on a single-buffered Banyan network is presented, and the results of this model are combined with models of the buffer controller (finite and infinite buffers).
Abstract: Banyan networks are being proposed for interconnecting memory and processor modules in multiprocessor systems as well as for packet switching in communication networks. This paper describes an analysis of the performance of a packet switch based on a single-buffered Banyan network. A model of a single-buffered Banyan network provides results on the throughput, delay, and internal blocking. Results of this model are combined with models of the buffer controller (finite and infinite buffers). It is shown that for balanced loads, the switching delay is low for loads below maximum throughput (about 45 percent per input link) and the blocking at the input buffer controller is low for reasonable buffer sizes.

255 citations


Proceedings ArticleDOI
18 Apr 1991
TL;DR: In this paper, the feasibility of bounding the delay jitter for real-time channels in a packet-switched store-and-forward wide-area network with general topology was made.
Abstract: A study is made of the feasibility of bounding the delay jitter for real-time channels in a packet-switched store-and-forward wide-area network with general topology, extending the scheme proposed in previous papers. The authors prove the correctness of the solution, and study its effectiveness by means of simulations. The results show that the scheme is capable of providing a significant reduction in delay jitter, that there is no accumulation of jitter along the path of a channel, and that jitter control reduces the buffer space required in the network significantly. >

212 citations


Journal ArticleDOI
TL;DR: The process of packet clustering in a network with well-regulated input traffic is studied and a strategy for congestion-free communication in packet networks is proposed, which provides guaranteed services per connection with no packet loss and an end-to-end delay which is a constant plus a small bounded jitter term.
Abstract: The process of packet clustering in a network with well-regulated input traffic is studied and a strategy for congestion-free communication in packet networks is proposed. The strategy provides guaranteed services per connection with no packet loss and an end-to-end delay which is a constant plus a small bounded jitter term. It is composed of an admission policy imposed per connection at the source node, and a particular queuing scheme practiced at the switching nodes, which is called stop-and-go queuing. The admission policy requires the packet stream of each connection to possess a certain smoothness property upon arrival at the network. This is equivalent to a peak bandwidth allocation per connection. The queuing scheme eliminates the process of packet clustering and thereby preserves the smoothness property as packets travel inside the network. Implementation is simple. >

170 citations


Journal ArticleDOI
TL;DR: The effect of transmission delay on speech quality in telecommunications is described, with human factors such as conversational mode and the talker's knowledge of the cause of delay taken into account.
Abstract: The effect of transmission delay on speech quality in telecommunications is described, with human factors such as conversational mode and the talker's knowledge of the cause of delay taken into account. Objective quality estimation methods for delay effects are proposed, and these methods are applied in an actual communications network. In connection with delay perception in a telephone conversation, the assumption was verified that a talker expects a particular response time from a partner, and that delay that is outside this expectation time window is noticed. Taking this information into account, a subjective conversational experiment is controlled by six kinds of tasks by varying the temporal characteristics. Thus, a subjective assessment of delay effects is obtained by laboratory tests in relation to the detectability threshold, opinion rating, and conversational efficiency. Objective quality measures for each test were defined as a linear combination of temporal parameters that correspond closely to subjective qualities. >

152 citations


Patent
12 Sep 1991
TL;DR: In this paper, a packet transmission system includes a mechanism for controling congestion in the transmission system by comparing, at each switching node of the system, the traffic load at that node and the traffic loads at all immediately neighboring switching nodes.
Abstract: A packet transmission system includes a mechanism for controling congestion (30, FIG. 2) in the transmission system by comparing, at each switching node of the system (52, FIG. 5), the traffic load at that node and the traffic loads at all immediately neighboring switching nodes. Such traffic loads can be measured by node buffer utilization, either discretely or continuously, and loading information exchanged by the use of messages between the switching nodes (42, 54). The packet transmission speed between any two adjacent switching nodes is then adjusted (47, 62) in response to the relative traffic loads so as to reduce the traffic incoming to the more congested node. The transmission speed is never reduced to zero, however, to insure that a mechanism remains in place to relieve congestion at every transmitting switching node.

130 citations


Patent
06 Dec 1991
TL;DR: In this article, the dynamic functional behavior of geographically distributed fast packet switching systems, including those which accommodate high-priority circuit switched traffic and low-priority packet switched traffic, are tested in real-time by sending test packets from one or more source nodes through the system to specific destinations that comprise a test packet analyzer.
Abstract: The dynamic functional behavior of geographically distributed fast packet switching systems, including those which accommodate high-priority circuit switched traffic and low-priority packet switched traffic, are tested in real-time by sending test packets from one or more source nodes through the system to specific destinations that comprise a test packet analyzer The test packets have the same structure as the data packets, but in their payload portion carry the entire information required to perform the testing The nature of that test information depends on the characteristics of a set of predefined system errors the verification system is supposed to identify For detecting errors, the test information would include an input address indicating the source of the test packet, a sequence number defining the order in which the packet should arrive at the destination, time bits relating to the packet length and/or to the expected packet transmission delay, and a cyclic redundancy code which covers the entire contents of the test packet, including its control portion Each analyzer at a receiving station operates autonomously from the senders and processes all received traffic in real-time; this enables it to recognize all defined system errors, even those occurring with very low probability, at the packet level

120 citations


Patent
10 May 1991
TL;DR: In this article, the transmission mode information is encoded into the preamble using one of two seven-bit cross compatible word sync patterns for each data packet and the receiver uses the word sync pattern to determine the receive mode for each packet.
Abstract: A power line communication (PLC) apparatus wherein transmission mode information is encoded into each data packet while maintaining immunity from single bit errors. In the present invention, a power line communication system includes a transmitter/receiver (i.e. transceiver) which is coupled to a power distribution network. Data is transmitted through the power line by the transceiver in packets. The transceiver includes a preamble generator which creates a preamble for each of the data packets and a preamble decoder that decodes the preamble of a data packet and determines word sync for the packet. The preamble generated by the preamble generator consists of a carrier detect interval, a carrier sync interval, a bit sync interval, and a word sync pattern. The transceiver may select either BPSK or QPSK transmission modes on a data packet by data packet basis by encoding information into the packet preamble. Transmission mode information is encoded into the preamble using one of two seven-bit cross compatible word sync patterns for each data packet. Thus, one word sync pattern is used to define a BPSK transmission while the other word sync pattern is used to define a QPSK transmission. The transmitter may send data packets using either BPSK or QPSK on a packet by packet basis by generating the appropriate word sync pattern for each packet. The receiver uses the word sync pattern to determine the receive mode for each packet.

98 citations


Patent
17 Sep 1991
TL;DR: In this paper, a reference delay generator includes a delay unit having a plurality of delay elements which are cascaded and respectively have variable delay times, and a control part detects a phase difference between the reference signal and the delayed signal and generates a control signal which sets the phase difference to an integer multiple of 90°.
Abstract: A reference delay generator includes a delay unit having a plurality of delay elements which are cascaded and respectively have variable delay times. The delay unit receives a reference signal and generates a delayed signal which is a delayed version of the reference signal. A control part detects a phase difference between the reference signal and the delayed signal and generates a control signal which sets the phase difference to an integer multiple of 90°. The control signal is applied to the delay elements, so that the delay times of the delay elements are changed on the basis of the control signal. The control signal is used for, for example, controlling a delay circuit which includes a plurality of delay elements identical to those of the delay unit.

90 citations


Proceedings ArticleDOI
02 Dec 1991
TL;DR: A conflict-free protocol for packet-switched wavelength division multiaccess networks with the use of a control channel, each station in the network can obtain packet backlog information of all the other stations, and so packet transmission can be scheduled to avoid destination conflicts.
Abstract: A conflict-free protocol for packet-switched wavelength division multiaccess networks is proposed. With the use of a control channel, each station in the network can obtain packet backlog information of all the other stations, and so packet transmission can be scheduled to avoid destination conflicts. A very fast scheduling algorithm is proposed. Simulation results show that a maximum throughput of 1 can be achieved, as compared to a maximum of 0.63 for protocols without transmission scheduling. This high throughput performance is obtained because the transmission, reception and processing of backlog information and the transmission and reception of data packets are all done simultaneously in a pipeline operation and all destination conflicts are avoided in every slot through scheduling. The packet delay is calculated to be only one slot (due to scheduling) larger than those protocols without transmission scheduling at low traffic conditions. >

80 citations


Proceedings ArticleDOI
02 Dec 1991
TL;DR: A buffer management policy, called drop on demand, is proposed which yields a greater switch throughput and lower packet loss probability than previously proposed policies for all input traffic rates.
Abstract: An imbalanced traffic model is presented, and the performance of completely shared buffering and output queuing under imbalanced traffic is studied. It is found that shared buffering does not perform as well as than output queuing under this traffic condition. A buffer management policy, called drop on demand, is proposed which yields a greater switch throughput and lower packet loss probability than previously proposed policies for all input traffic rates. The optimal buffer management policy is studied for a class of dynamic allocation schemes with packet purging action. It is found that there exists an optimal stationary policy which can be obtained by solving a linear programming problem. >

Patent
25 Mar 1991
TL;DR: In this article, a packet switching system is defined, which selectively interconnects a plurality of users and telecommunications devices with applications programs via a packet-switching network (10).
Abstract: A packet switching system (100) which selectively interconnects a plurality of users (110) and telecommunications devices (112) with applications programs (101) via a packet switching network (10). The packet switching network is comprised of a plurality of processing cells (18). Switching fabric (116) processes data from users (115) and devices (112) to generate digital signal packets in conformance with conventional protocols.

Proceedings ArticleDOI
01 Nov 1991
TL;DR: By integrating network-control into the image data compressional algorithm, the strong interactions between the coder and the network can be exploited and the available network bandwidth can be used best.
Abstract: The advantages of packet video, constant image quality, service integration and statistical multiplexing, areovershadowed by packet loss, delay and jitter. By integrating network-control into the image data compressionalgorithm, the strong interactions between the coder and the network can be exploited and the available network bandwidth can be used best . In order to enable video transmission over today's networks without reservation orpriorities and in the presence of high packet loss rates, congestion avoidance techniques need to be employed. This isachieved through rate and flow control, where feedback from the network is used to adapt coding parameters and varythe output rate. From the coding point of view the network is seen as data buffer. Analogously to constant bit rateapplications, where a controller measures buffer fullness, we attempt to avoid network congestion (eq. buffer overflow)by monitoring the network and adapting the coding parameters in real-time. 1. INTRODUCTION

Patent
31 Oct 1991
TL;DR: In this article, the sequence number associated with a retransmitted data packet is deleted from the list and then appended to the list to place the number in proper relationship with the sequence numbers of transmitted after the initial transmission of the retransmit data packet.
Abstract: A facility is provided for use in a packet switch to control unnecessary multiple retransmissions of a data packet. In an exemplary embodiment of the invention, such control is achieved by tracking in a list the sequence numbers of transmitted data packets and retransmitting a data packet only if its sequence number appears in the list prior to the sequence number of the last data packet that is received correctly by a receiver. The sequence number associated with a retransmitted data packet is deleted from the list and then appended to the list to place the number in proper relationship with the sequence numbers of data packets transmitted after the initial transmission of the retransmitted data packet.

Journal ArticleDOI
TL;DR: In this article, a dynamic rate control mechanism for voice and video traffic is proposed to achieve better statistical gain for voice traffic and to relieve congestion in fast packet networks, where the feedback delay for the source node to obtain the network congestion information is represented in the model.
Abstract: To achieve better statistical gain for voice and video traffic and to relieve congestion in fast packet networks, a dynamic rate control mechanism is proposed. An analytical model is developed to evaluate the performance of this control mechanism for voice traffic. The feedback delay for the source node to obtain the network congestion information is represented in the model. The study indicates that significant improvement in statistical gain can be realized for smaller capacity links (e.g., links that can accommodate less than 24 voice calls) with a reasonable feedback time (about 100 ms). The tradeoff for increasing the statistical gain is temporary degradation of voice quality to a lower rate. It is shown that whether the feedback delay is exponentially distributed or constant does not significantly affect performance in terms of fractional packet loss and average received coding rate. It is also shown that using the number of calls in talkspurt or the packet queue length as measures of congestion provides comparable performance. >

Patent
13 Aug 1991
TL;DR: In this article, a traffic shaping method and circuit of a packet switching system was proposed, in which input packets having a fixed length and multiplexed on a plurality of inputs are delivered to any output of a pluralityof outputs, connects the input packet to a list structure using an address chain formed for each output, forms the list structure even for each line identifier provided in the packet, and assigns the identifier for each time slot of the output to take out the packet from the list topology to prevent the packet having the same identifier from being multiple-xed and delivering to
Abstract: A traffic shaping method and circuit of a packet switching system in which input packets having a fixed length and multiplexed on a plurality of inputs are multiplexed to be delivered on any output of a plurality of outputs, connects the input packet to a list structure using an address chain formed for each output, forms the list structure even for each line identifier provided in the packet, and assigns the identifier for each time slot of the output to take out the packet from the list structure, to thereby prevent the packet having the same identifier from being multiplexed and delivering to the output continuously.

Proceedings ArticleDOI
07 Apr 1991
TL;DR: A novel strategy for the transmission and multiplexing of delay-sensitive traffic, e.g., voice and video, in packet networks is described, which provides bounded end-to-end delay to all delay- sensitive traffic and guarantees loss-free transmission to any traffic with such a requirement.
Abstract: A novel strategy for the transmission and multiplexing of delay-sensitive traffic, e.g., voice and video, in packet networks is described. The strategy provides bounded end-to-end delay to all delay-sensitive traffic guarantees loss-free transmission to any traffic with such a requirement. To achieve statistical multiplexing gain, loss performance is provided to the rest of delay-sensitive traffic on an as-needed basis, with possible distinction among different classes. Bounded end-to-end delay is obtained by performing statistical multiplexing at the switching nodes on a duration-limited basis. Loss-free transmission is achieved by means of an underlying service discipline called stop-and-go queuing. The performance of the strategy for some special cases is analyzed, and analytical expressions for the loss probability are derived. >

Proceedings ArticleDOI
07 Apr 1991
TL;DR: Results suggest that the lower delay, lower lost packet performance, and high saturation throughputs are offered by distance prioritization.
Abstract: A network is studied in which contention for an outbound link is resolved by assigning to each packet a priority based on its distance to destination and its age (number of misroutes previously suffered). Queueing delay, lost packet performance and network aggregate capacity (saturation throughput) are compared for distance-age prioritization, age-distance prioritization and no prioritization. Results suggest that the lower delay, lower lost packet performance, and high saturation throughputs are offered by distance prioritization. The tails of the probability distribution for the number of hops taken by a representative packet are, however, shorter for age-distance routing. Typical results show that, for a multihop shuffle network with 10240 nodes, the saturation throughput is about 40% higher for distance-age prioritization. For a smaller network with 384 nodes, the improvement falls to 25%. >

Book ChapterDOI
18 Nov 1991
TL;DR: It would be useful to offer to the network's users a jitter control service based on the mechanism proposed here, which makes the distribution of buffer space requirements more uniform over a channel's route, and reduces by a non-negligible amount the total buffer space needed by a channel.
Abstract: Delay jitter is the variation of the delays with which packets traveling on a network connection reach their destination. For good quality of reception, continuous-media (video, audio, image) streams require that jitter be kept below a sufficiently small upper bound. This paper proposes a distributed mechanism for controlling delay jitter in a packet-switching network. The mechanism can be applied to an internetwork that satisfies the conditions detailed in the paper, and can coexist with other schemes (including the absence of any scheme) for jitter control within the same network, the same node, and even the same real-time channel. The mechanism makes the distribution of buffer space requirements more uniform over a channel's route, and reduces by a non-negligible amount the total buffer space needed by a channel. The paper argues that, if these advantages are sufficient to justify the higher costs of the distributed jitter control mechanism with respect to a non-distributed one, it would be useful to offer to the network's users a jitter control service based on the mechanism proposed here.

Patent
29 Apr 1991
TL;DR: In this paper, the authors describe a packet switching system in which packets comprising logical addresses and voice/data information are communicated through the system by packet switching networks which are interconnected by high-speed digital trunks with each of the latter being directly terminated on both ends by trunk controllers.
Abstract: A communication method and packet switching system in which packets comprising logical addresses and voice/data information are communicated through the system by packet switching networks which are interconnected by high-speed digital trunks with each of the latter being directly terminated on both ends by trunk controllers. During initial call set-up of a particular call, central processors associated with each network in the desired route store the necessary logical to physical address information in the controllers which perform all logical to physical address translations on packets of the call. Each network comprises stages of switching nodes which are responsive to the physical address associated with a packet by a controller to communicate this packet to a designated subsequent node. The nodes provide for variable packet buffering, packet address rotation techniques, and intranode and internode signaling protocols. Each packet has a field which is automatically updated by the controllers for accumulating the total time delay incurred by the packet in progressing through the networks. Each processor has the capability of doing fault detection and isolation on the associated network, trunks, and controllers by the transmission of a single test packet. The testing is done solely in response to the test packet and no preconditioning of controllers or networks is necessary.

Patent
Eddy C. Huang1
05 Mar 1991
TL;DR: In this paper, a variable delay circuit consisting of a single-stage CMOS delay circuit having an associated time delay between its input and output is presented. But the complexity of the delay circuit is not addressed.
Abstract: A variable delay circuit consists of a single-stage CMOS delay circuit having an associated time delay between its input and output. A first transistor connects a voltage supply node to other portions of the single-stage CMOS delay circuit. The impedance of the first transistor corresponds to an associated time delay. A second transistor, gated by a control signal, connects the voltage supply node and the other portions of the single-stage CMOS delay circuit in parallel with the first P-channel transistor. The delay circuit delays signals for a longer period of time when the second transistor is disabled by said control signal than when the second transistor is enabled. In a variation on this delay circuit, a plurality of delay control elements are coupled to the single-stage delay circuit, each accepting a distinct control signal and decreasing the delay circuits associated time delay to a corresponding shorter delay time when its control signal is enabled. This delay circuit delays signals by a multiplicity of distinct delay times in accordance with the control signals. Further variability in the delay time can be achieved by cascading a plurality of delay stages, with two or more of the said cascaded delay stages comprising a variable delay circuit with a delay time that is governed by one or more control signals. A multiplicity of different delay times can be selected via the control signals for the various variable delay stages.

Patent
21 Jan 1991
TL;DR: In this paper, a packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output ports information, and a control unit for terminating a control packet and performing the call processing function is provided.
Abstract: A packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output port information, and a control unit for terminating a control packet and performing the call processing function. A switching node or tandem unit is provided including at least one self-routing switch for interconnecting the local units. A device is provided for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device.

Journal ArticleDOI
TL;DR: An efficient hybrid simulation of the packet voice multiplexer which can be used to find the delay distribution for a large number of trunks is presented and the accuracy of the M/D/1 approximation is investigated.
Abstract: The performance of a statistical multiplexer whose inputs consist of a superposition of voice packet streams is studied. The delay for such a system is analyzed by solving the Sigma D/sub i//D/1 queue. The analytic method can be used to find the approximate mean delay for an arbitrarily large number of trunks and the approximate delay distribution when the number of trunks is less than 100. An efficient hybrid simulation of the packet voice multiplexer which can be used to find the delay distribution for a large number of trunks is presented. In addition, easily computable error bounds for the present approximation are provided, and the accuracy of the M/D/1 approximation is investigated. >

Book
02 Jan 1991
TL;DR: An overview is given of a system designed to handle a heterogeneous and dynamically changing mix of applications that is based on fiber-optic transmission systems and high-performance packet switching and can handle applications ranging from low-speed data to voice to full-rate video.
Abstract: An overview is given of a system designed to handle a heterogeneous and dynamically changing mix of applications. It is based on fiber-optic transmission systems and high-performance packet switching and can handle applications ranging from low-speed data to voice to full-rate video. A novel feature is a flexible multipoint connection capability suitable for broadcast and conferencing applications. The architecture of a switching systems that can be used to support this network is described. >

Journal ArticleDOI
TL;DR: The photonic packet switch using semiconductor optical amplifiers has a crosstalk performance better than 40 dB and allows the possibility of packet switch integration onto a single substrate.
Abstract: Photonic packet switching using semiconductor optical amplifiers is reported. The optical amplifiers are used as gates to switch the optical packets and also as modulators to provide address header replacement. This eliminates the need for the fibre delay line used in previous photonic packet switching demonstrations, and allows the possibility of packet switch integration onto a single substrate. The photonic packet switch has a crosstalk performance better than 40 dB.

Proceedings ArticleDOI
07 Apr 1991
TL;DR: The proposed congestion control scheme copes with traffic surges that are shorter than the network round-trip delay, and is targeted towards networks that carry aggregated traffic, and can be applied to ATM-based networks.
Abstract: Issues in congestion control are discussed, and a novel congestion control scheme for high-speed networks is described. The scheme is based on periodic transmission of sample time-stamped packets through the network. Upon reception, the packet delays are calculated, averaged, and used to determine the state of the network. The information on the state of the network is then used to drive the network admission control. The major advantage of the proposed scheme over conventional congestion control techniques is that it copes with traffic surges that are shorter than the network round-trip delay. This is achieved by controlling traffic admission with a continuous estimate of the network state. The scheme is targeted towards networks that carry aggregated traffic, and can be applied to ATM-based networks. >

Journal ArticleDOI
TL;DR: Simulation is used to estimate the performance of media access control protocols derived from carrier-sense multiple access with collision detection and operating in local area networks comprising several parallel broadcast channels, and results indicate that the multichannel option provides reductions in both the packet delay average and variance.
Abstract: Simulation is used to estimate the performance of media access control (MAC) protocols derived from carrier-sense multiple access with collision detection (CSMA/CD), and operating in local area networks comprising several parallel broadcast channels. The influence of possible protocol and system alternatives on the network performance is discussed, based on results of the packet delay average, variance, mean square, coefficient of variation, and histogram, as well as the packet rejection probability due to lack of buffer space. The delay incurred by multipacket messages is estimated, comparing the single channel to the multichannel option. Numerical results indicate that the multichannel option provides reductions in both the packet delay average and variance, even when stations are only able to simultaneously receive from a subset of channels. >

Patent
24 Apr 1991
TL;DR: In this article, the authors propose a scheme to reduce the loss of message packets that are transmitted in the course of virtual connections in an asynchronous transfer mode and which comprise a packet header identifying the respective virtual connection, the message packets being respectively augmented by a continuous auxiliary identifier and, after multiplication, being separately transmitted via redundant switching matrices of packet switching equipment.
Abstract: In order to reduce the loss of message packets that are transmitted in the course of virtual connections in an asynchronous transfer mode and which comprise a packet header identifying the respective virtual connection, the message packets being respectively augmented by a continuous auxiliary identifier and, after multiplication, being separately transmitted via redundant switching matrices of a packet switching equipment, it is provided that, with reference to the auxiliary identifier, only that message packet transmitted without fault as a first of the multiplied message packets and having an auxiliary identifier that is the next one following the most recently-transmitted message packet is forwarded. In addition, that switching matrix by way of which the transmission of message packets respectively occurs most slowly is identified and message packets that are transmitted via the respective slowest switching matrix as the first of the multiplied message packets are forwarded.

Proceedings ArticleDOI
Kai Y. Eng1, Mark J. Karol1
23 Jun 1991
TL;DR: A growable switch architecture consisting of an output column of 'small' packet switch modules preceded by a memoryless distribution network is proposed, which allows modular growth to very large switch sizes while conforming to the board input/output (I/O) constraints.
Abstract: A growable switch architecture consisting of an output column of 'small' packet switch modules preceded by a memoryless distribution network is proposed. This architecture allows modular growth to very large switch sizes while conforming to the board input/output (I/O) constraints. As incoming packets (asynchronous transfer mode (ATM) cells) arrive to enter the fabric, they are routed instantaneously to their respective output packet switch modules on a slot-by-slot basis through the cell distribution network, and the maximum number of cells accepted into each output packet switch module is designed according to the generalized knockout principle. Buffering of multiple cell arrivals to a destination is provided only in the output packet switch modules, thus achieving perfect output queueing and hence the best delay-throughput performance. >

Proceedings ArticleDOI
23 Jun 1991
TL;DR: A network operating with deflection routing and nonuniform traffic and an arbitrary but known propagation delay is considered, and independence approximations are used to describe the distribution of packet arrivals at each node.
Abstract: A network operating with deflection routing and nonuniform traffic is considered. In addition, each communication link may be characterized by an arbitrary but known propagation delay. A study is made of three distinct contention resolution rules, focusing on one which gives priority to those packets that have been in the network longest. Independence approximations are used to describe the distribution of packet arrivals at each node. A recursive equation is written for each node and used to derive approximate steady-state packet delay distributions. Examples are presented and the independence assumption is discussed. >