Showing papers on "Voltage droop published in 1995"

High precision voltage regulation circuit for programming multilevel flash memory

Abstract: A voltage regulation circuit (45) that includes a sample and hold circuit (501) for sampling an input voltage (Vin). The sample and hold circuit (501) includes a capacitor (C1, 515) that holds the reference voltage. The voltage regulation circuit (45) also includes a regulator circuit (503) coupled to the capacitor (C1) of the sample and hold circuit (501). The regulator circuit (503) outputs an output voltage using the reference voltage supplied by the capacitor (C1). The voltage regulation circuit (45) may be used to provide a high precision programming voltage for programming memory cells having two or more analog states.

A new approach to enhance power quality for medium voltage drives

Abstract: A new approach to medium voltage, variable frequency, static AC motor drives offers improvements in power quality. Harmonic current injection into power lines is below the most severe requirements of IEEE 519-1992. The power factor of this new type of drive exceeds 94% at full load and is above 90% at 10% load. Motor voltage and current waveforms are improved so that torque pulsations are reduced. Peak voltage stress on motor insulation does not exceed peak input line voltage, and no zero sequence voltage is imposed. Drive efficiency exceeds 96%. This paper describes the new approach, and some of the results achieved.

Output control circuit for transmission power amplifying circuit

Abstract: A higher output of two outputs from a trapezoidal wave generating circuit 4 and a pulse generating circuit 5 is produced. The control voltage signal is formed by combining the trapezoidal wave signal and the pulse signal. Sharp rising and falling edges of the pulse voltage are selected for controlling the transmission power amplifying circuit 1 in a voltage range below a predetermined voltage level, whereas gentle rising and falling edges of the trapezoidal wave signal are used for controlling the circuit 1 in a voltage range above that voltage level.

A new technique for voltage stability analysis in a power system and improved loadflow algorithm for distribution network

Abstract: Voltage collapse may occur in a power system due to loss in voltage stability in the system. Therefore voltage stability analysis is important in order to identify critical buses in a power system, i.e. buses which are closed to their voltage stability limits and thus enable certain measures to be taken by the control engineer in order to avoid any incidence of voltage collapse. This paper presents a new technique to determine the static voltage stability of load buses in a power system for a certain operating condition and hence identifies load buses which are close to voltage collapse. A voltage stability index with respect to a load bus is formulated from the voltage equation derived from a two bus network and it is computed using a Thevenin equivalent circuit of the power system referred to a load bus. This index indicates how far the load buses are from their voltage stability limits and hence identifies the critical buses. The performance of this index is tested using a 9 bus radial network and the 24 bus IEEE Reliability Test System for its validity. A comparison is also made between this index and the impedance ratio used by Sterling et al. as the voltage collapse indicator. This paper also presents a new loadflow technique to compute the power flow solution for a radial network which is found to be more superior than the Second Order Newton Raphson and Distflow since it takes less iterations to give a loadflow solution.

High voltage start-up circuit and method therefor

Abstract: The present invention relates to a switchmode power supply (SMPS) high voltage start-up integrated circuit (IC) with output voltage sensing and output current limiting. The high voltage start-up IC allows low voltage pulse width modulated (PWM) controller ICs to operate directly off rectified AC lines of up to 450 VDC. The high voltage start-up IC allows PWM controller ICs to start-up with a start threshold larger than its operating voltage. The output voltage is monitored internally so that the internal high voltage switch turns off when the output voltage decreases below an internally set trip point voltage (V off ). The internal high voltage switch remains off and an external auxiliary voltage is generated and applied to the output voltage. If the output voltage falls below a lower set trip point voltage (V reset ) the internal high voltage switch turns back on. This allows the start-up circuit to reset itself when the PWM controller IC's auxiliary voltage does not power up properly.

An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V

Abstract: We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.

Transient behavior of biological loop models with application to the droop model

Abstract: In this paper we study the transient behavior of a class of nonlinear differential systems verifying sign conditions through the succession of extrema of the state variables. This analysis does not depend, for the main part, on the analytical formulation of the model. The possible scenarios of sequences for the extrema, are represented on a graph and can be compared with the experimental data to validate the model. An application to the Droop model illustrates this method; we obtain as a result the global stability of the equilibrium and the possible successions of the extrema.

High voltage charge pump using low voltage type transistors

Abstract: An integrated circuit includes an N isolation buried layer underlying high density and low voltage type P channel and N channel transistors to define islands of arbitrary voltage on the substrate. Thus such transistors, which otherwise are capable only of low voltage operation, become capable of operating at high voltage relative to the substrate. This allows integration, on a single chip, of high voltage circuit elements with low voltage and high density transistors all formed by the same fabrication process sequence. In one example this allows creation of an 18 volts range charge pump using a CMOS process which normally provides only 3 volt operating range transistors. This then allows integration on a single integrated circuit chip of a complex digital logic function such as a UART (universal asynchronous receiver and transmitter) with a high voltage function such as an RS-232 interface, including integrated capacitors for the RS-232 interface charge pump.

Front-end power converter for distributed power systems

Abstract: A front end converter for interfacing prime power to a lower voltage distribution bus, e.g., Vdc, in a distributed power system has a natural droop characteristic which emulates a series resistor, but without associated losses. With this droop characteristic, converters are paralleled and share load current without any interconnecting control signals, thus avoiding any single point of failure and the need for several high-voltage isolation devices. The drooping effect also has a damping effect, resulting in a more stable power system.

A voltage clamped parallel resonant converter with controllable duty cycle

Abstract: A high efficiency static voltage clamped parallel resonant converter for converting power between two AC and/or DC circuits includes a link circuit (30) between an input switch circuit (20) and an output switch circuit (10). The link circuit comprises a parallel resonant circuit and link switch elements (Sc1 and Sc2) which are switched to generate a unipolar train of link voltage pulses. All of the switches are 'soft-switched' on and off at substantially zero voltage or zero current. Each link voltage pulse consists of a zero segment and a non-zero segment. The duty cycle of these voltage pulses is controllable by the link switches and such that the duration of the zero and non-zero segments are independently controllable. Pulse width modulation (PWM) and pulse area modulation (PAM) can be applied for reduced filtering requirements and maintaining high efficiency for operation at fractional load conditions. The link voltage is clamped to a maximum voltage during the non-zero segment of each link voltage pulse. Resonant oscillation due to the resonant circuit is active only during the transitions between the zero and non-zero voltage levels of the link voltage pulses. As a result, all converter components will be exposed to voltage and current levels which are higher than the load voltage and current levels by just a small fraction.

Methods and apparatuses for backgaging and sensor-based control of bending operations

Abstract: Several methods and subsystems are disclosed for aligning a workpiece (16) as it is being loaded into a die space of a bending apparatus (29), and for performing sensor-based control of a robot as it moves a workpiece from one location to another within a bending apparatus environment. A backgaging mechanism is provided with finger gaging mechanisms (100, 102) having force sensors (104) for sensing forces in directions perpendicular to and parallel to a die (19). In addition, a robot gripper sensor (128) is provided for sensing either or both of shear forces and normal forces created by movement of a workpiece being held by the gripper (14). Several sensor-based control modules are disclosed, including a bend-following control module, a speed control module, a module for actively damping vibrations in a workpiece, a module for controlling active compliance/contact between a workpiece and an obstacle, a module for performing a guarded move to intentionally bring a workpiece into contact with an obstacle, and a module for detecting unintentional impacts between a workpiece and an obstacle. Several droop sensing methods and systems are also disclosed, including methods for performing droop sensing and compensation with the use of a vision-based droop sensor, a compound break-beam droop sensor, and a single break-beam droop sensor. In addition, an angle sensor is disclosed, along with a springback control method utilizing the disclosed angle sensor.

Clock signal and line voltage control for efficient power consumption

Abstract: A frequency of an operation clock signal CPCK output from a PLL circuit 3 is determined with division factors N and M stored in division factor memories 2 and 12. A voltage control signal LPS is input into a voltage-controlled oscillator in the PLL circuit 3 as well as to a line voltage control circuit 9. The line voltage control circuit 9 controls the level of a line voltage E supplied to other circuits including a CPU 1, in response to the voltage control signal LPS. Efficient power consumption and an appropriate operation speed are simultaneously attained because both of the frequency of the operation clock signal CPCK and the level of the line voltage E depend upon the voltage level of the voltage control signal LPS.

Design of a 100-MHz 10-mW 3-V sample-and-hold amplifier in digital bipolar technology

Abstract: This paper describes the design of an all-npn open-loop sample-and-hold amplifier intended for use at the front end of analog-to-digital converters. Configured as a quasidifferential topology, the circuit employs capacitive coupling between the input and output to achieve differential voltage swings of 3 V in a 3.3-V system. It also exploits the high speed of bipolar transistors to attain a sampling rate of 100 MHz with a power dissipation of 10 mW. A prototype fabricated in a 1.5-/spl mu/m 12-GHz digital bipolar technology exhibits harmonics 60 dB below the fundamental with a 10-MHz sinusoidal input. The hold-mode feedthrough is less than -60 dB and the droop rate is 100 /spl mu/V/ns. >

Cruise control governor using optimal droop selection logic

Abstract: A cruise control governor which is able to dynamically define and switch between various goal droop curves in order to find the best goal droop curve for use with the current vehicle driving situation. For instance, the present invention will dynamically define and select different goal droop curves when the vehicle is lugging up a hill, coasting down a hill, cruising on level ground, preparing to crest a hill, or preparing to transition off of a downhill slope.

Delay circuit, oscillation circuit and semiconductor memory device

Abstract: A delay circuit having standby state and active state and designed to output at least one signal obtained by delaying an input signal. The delay circuit comprises a storage circuit and at least one amplifier circuit. In operation, the storage circuit receives an input signal, generates a first voltage when the input signal is inverted, and generates a second voltage from a difference between the first voltage and a first supply voltage. The amplifier circuit amplifies the difference between the first voltage and the second voltage. The storage circuit includes at lease one constant-voltage generating section for generating the first voltage when the input signal is inverted, at least one constant-current generating section for generating a current proportional to the difference between the first voltage and the first supply voltage, and at least one capacitor having a first terminal set at the first supply voltage or a second supply voltage, and a second terminal charged to the first supply voltage while the delay circuit remains in the standby state and charged or discharged to the second voltage with the current generated by the constant-current generating section while the delay circuit remains in the active state.

Off-chip driver with voltage regulated predrive

Abstract: An off-chip driver with regulated supplies compensates for power supply fluctuations. The circuit reduces di/dt noise by providing complementary voltage regulators (34,36) to regulate the high and low supplies to the driver stages (16) such that they see a constant operating voltage regardless of changes in supply voltage, VCC. The circuit uses two push-pull stages (10) which charge and discharge the output load capacitance, C₀. This regulated voltage to the driver stages (16) reduces di/dt noise and provides a constant overdrive voltage, constant gate slew rate, and constant staging delay over a specified external supply voltage range.

5 volt driver in a 3 volt CMOS process

Abstract: A CMOS voltage level shifter that is comprised of a pull-up device coupled between a first voltage supply and an node to pull up that node to the voltage of the first voltage supply. The pull-up device is responsive to a first voltage signal. A pull-down device is also included that is coupled between the node and a reference voltage supply to pull down that node to a voltage of the reference voltage. The pull-down device is responsive to second and third voltage signals. A feedback circuit is included that provides the second voltage signal to the pull-down device. A level shifted output voltage signal is provided at the node.

Automatic gain control device for producing constant amplitude output signal

Abstract: A variable gain amplifying circuit is controlled by a control voltage Vc from which a high-frequency component has been removed. To provide the control voltage Vc, a holding circuit smoothes the higher one of an output voltage of the variable gain amplifying circuit, which has been rectified by a rectifying circuit, and a voltage detected by a minute voltage detecting circuit, so that the control voltage Vc is obtained via a direct-current amplifying circuit. Since the clamping circuit varies the control voltage Vc based on a reference voltage Vref on receiving a minute input signal, even when an AGC characteristic is changed by varying the reference voltage Vref, the minimum gain is always corrected to be constant.

Transient load controller for gas turbine power generator

Abstract: A transient control system for a gas turbine controller that cooperates with a droop speed governor to generate fuel commands regulating fuel flow to combustors of the gas turbine. The transient control system provides compensation for variations in the power output of a gas turbine while the turbine is in transient phase operation. A proportional plus integral controller in the transient control system establishes a power output set point at the initiation of a transfer phase and compares the set point to the current power output of the gas turbine. An output signal indicative of the current power output and its set point generated by the proportional plus integral controller is applied to the droop governor to compensate for variations in the power output of the gas turbine during the transient phase.

High efficiency, no dropout uninterruptable power supply

Abstract: According to the present invention, a high efficiency no-dropout uninterruptible power supply is presented which will provide desired UPS characteristics while reducing or eliminating undesirable characteristics. In particular, simultaneous improvements are achieved in the areas of switchover transfer response time, droop and transients, EMI generation, power efficiency and heat generation, size, weight, ease of waveshaping, and powerline frequency sensitivity. The invention utilizes dual concurrent feedback loops to control utility-backup power transfer and incorporates a novel method of synchronized AC output generation which allows zero-power switching and simple high-frequency waveshaping control.

A novel method to achieve zero-voltage regulation in buck converter

Abstract: The function control law for a buck converter is derived to achieve zero voltage regulation of the output voltage. A new method to retrieve the low frequency component of the inductor voltage is proposed and analyzed. The stability of the closed loop system using a proportional and differential controller is analyzed. The effect of the supply voltage and load current disturbance is also studied. The analysis, computer simulation by PSPICE and experimental results illustrate that excellent performance can be achieved by the function control law. >

Variable droop engine speed control system

Abstract: A variable droop engine speed control system includes a proportional-integral-derivative (PID) engine speed controller as its central component. The PID controller includes the standard proportional, integral and derivative gains associated with the proportional, integral and derivative portions of the controller, and further includes a droop gain associated only with the integral portion. The PID transfer function has a pole associated strictly with the droop gain such that a full range of droop may be provided by varying only the droop gain. Varying the droop gain affects only the steady-state frequency response of the PID so that its dynamic compensation is not disturbed by varying the amount of droop

Power supply apparatus for efficiently utilizing battery and electronic apparatus using the power supply

Abstract: A booster type DC-DC conversion circuit and a voltage reduction type DC-DC conversion circuit are connected in series with a battery. When battery voltage is high, the booster type DC-DC conversion circuit does not operate, and the voltage reduction type DC-DC conversion circuit outputs a constant voltage lower than the battery voltage. When the battery voltage drops, the booster type DC-DC conversion circuit operates, and converts the battery voltage to a constant voltage higher than the operation voltage of the voltage reduction type DC-DC conversion circuit. The voltage reduction type DC-DC conversion circuit outputs a constant voltage. The power supply apparatus can continuously output a constant voltage from when the battery voltage is high until it becomes low, and can efficiently utilize the battery capacity.

Voltage multiplier with linearly stabilized output voltage

Abstract: A voltage multiplier includes a first charge transfer capacitor designed to take and transfer electrical charges from the input terminal to the output terminal, a second capacitor for charge storage connected between the output terminal and ground and an output voltage stabilization circuit. The output voltage stabilization circuit includes an integrator designed to generate a continuous voltage corresponding to the difference between a reference voltage and the output voltage of the voltage multiplier. The continuous voltage is applied to one terminal of said charge transfer capacitor so that the potential at the other terminal of the capacitor changes proportionally to the output voltage of the voltage multiplier.

Reference voltage generation circuit having compensation function for variations of temperature and supply voltage

Abstract: A reference voltage generation circuit for a semiconductor memory device comprising a reference voltage generator for generating first and second reference voltages, the first and second reference voltages having the opposite response characteristics with respect to a variation in a temperature or a supply voltage, a start-up circuit for determining an initial condition of the reference voltage generator in response to the supply voltage to stabilize the operation of the reference voltage generator, and a voltage amplifier for compensating a target reference voltage for the temperature variation in response to the first and second reference voltages from the reference voltage generator so that the target reference voltage can always be constant in level. The first reference voltage has a positive response characteristic with respect to the temperature and the supply voltage and the second reference voltage has a negative response characteristic with respect to the temperature and the supply voltage.

High speed, low voltage non-volatile memory

Abstract: A low voltage EPROM which increases its reading speed by charging a word line to a voltage higher than Vcc during a read operation. Two voltage pumps (17, 18), which alternatively place charge on a word line, receive control signals of opposite phase from a temperature insensitive oscillator (13). The voltage from the two voltage pumps (17, 18) passes through a zero threshold voltage n-type pass device (PAn) to a word line (WL0n-WL3n). The zero threshold voltage n-type pass device (PAn) receives its control signal from a third voltage pump (19). In order to make the low voltage EPROM compatible with standard 5V programmers, each output driving circuit consists of a large output driver (55) used under low voltage Vcc conditions and a smaller output driver (57) used under standard 5V Vcc conditions.

Overvoltage disconnect circuit for lithium ion batteries

Abstract: A lithium ion or similar lithium secondary battery pack (10) includes an overvoltage disconnect circuit having an overvoltage disconnect switch (14), a voltage detector (16), and a delay circuit (18). The battery pack is connectable to a recharger which was not designed to accomodate the charge regime of the lithium ion cell or cells (12), such as a nickel system recharger (20). The voltage detector samples the battery voltage and changes its output signal if the battery voltage reaches an upper voltage threshold. The output of the voltage detector will not revert back until the battery voltage drops to a lower voltage threshold, which is below the upper voltage threshold.

High speed three-state sampling

Abstract: The present invention describes a novel method and apparatus for sampling an input/output pin of an electronic device at high speeds, comprising the steps of: driving the device input/output pin through a series resistor with a middle voltage between the high and low voltages of the device; sampling and latching the voltage at the input/output pin; comparing the latched voltage at the device input/output pin with a high threshold voltage which is between the high voltage of the device and the middle voltage; comparing the latched voltage at the device input/output pin with a low threshold voltage which is between the low voltage of the device and the middle voltage; and using the results of the two comparisons to determine whether the device input/output pin is driving high, driving low, or in an input mode.

Current-limited system for capacitive load powering

Abstract: In a capacitor-based energy storage system, in which the capacitor charging voltage is on the same order of magnitude as the system output voltage, the time between recharges for a given energy release rate is extended by producing an intermediate regulated capacitor output of a voltage having a lower order of magnitude and then stepping that voltage back up to the system output voltage through the use of an inverter. Regulation of the capacitor output voltage may be achieved through the use of a capacitor-voltage-dependent variable-duty-cycle switching transistor and an averaging network, which together maintain a level inverter input voltage independently of the capacitor voltage. The cycle control is powered by a rechargeable battery which recharges from the inverter input but cannot drive the inverter, and current and temperature sensing means are provided to control the transistor so as to limit the current draw through the transistor and to prevent battery overheating during operation.