scispace - formally typeset
Search or ask a question

Showing papers on "Voltage multiplier published in 2010"


Journal ArticleDOI
TL;DR: In this article, a novel interleaved high step-up converter with voltage multiplier cell is proposed to avoid the extremely narrow turn-off period and to reduce the current ripple, which flows through the power devices compared with the conventional interleaving boost converter in high stepup applications.
Abstract: A novel interleaved high step-up converter with voltage multiplier cell is proposed in this paper to avoid the extremely narrow turn-off period and to reduce the current ripple, which flows through the power devices compared with the conventional interleaved boost converter in high step-up applications. Interleaved structure is employed in the input side to distribute the input current, and the voltage multiplier cell is adopted in the output side to achieve a high step-up gain. The voltage multiplier cell is composed of the secondary windings of the coupled inductors, a series capacitor, and two diodes. Furthermore, the switch voltage stress is reduced due to the transformer function of the coupled inductors, which makes low-voltage-rated MOSFETs available to reduce the conduction losses. Moreover, zero-current-switching turn- on soft-switching performance is realized to reduce the switching losses. In addition, the output diode turn-off current falling rate is controlled by the leakage inductance of the coupled inductors, which alleviates the diode reverse recovery problem. Additional active device is not required in the proposed converter, which makes the presented circuit easy to design and control. Finally, a 1-kW 40-V-input 380-V-output prototype operating at 100 kHz switching frequency is built and tested to verify the effectiveness of the presented converter.

245 citations


Journal ArticleDOI
TL;DR: In this article, a high power-factor rectifier suitable for universal line base on a modified version of the single-ended primary inductance converter (SEPIC) is presented, where voltage multiplier technique is applied to the classical SEPIC circuit, obtaining new operation characteristics as low-switchvoltage operation and high static gain at low line voltage.
Abstract: A high-power-factor rectifier suitable for universal line base on a modified version of the single-ended primary inductance converter (SEPIC) is presented in this paper. The voltage multiplier technique is applied to the classical SEPIC circuit, obtaining new operation characteristics as low-switch-voltage operation and high static gain at low line voltage. The new configuration also allows the reduction of the losses associated to the diode reverse recovery current, and soft commutation is obtained with a simple regenerative snubber circuit. The operation analysis, design procedure, and experimental results obtained from a 650-W universal line power-factor-correction prototype of the proposed converter are presented. The theoretical analysis and experimental results obtained with the proposed structure are compared with the classical boost topology.

147 citations


Journal ArticleDOI
TL;DR: In this paper, the authors introduce a new design method of the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum total capacitance value.
Abstract: Even though the half-wave Cockcroft-Walton voltage multiplier (H-W C-W VM) is one of the most common ac-dc step-up topologies, VM designers tend to use equal capacitances in every stage, a fact that leads to a nonoptimal design. The aim of this paper is to introduce a new design method of H-W C-W VM that lays on the calculation of the optimal number of stages, which is necessary to produce the desired output voltage with the minimum total capacitance value. For this purpose, an adequate choice of the capacitance values per stage is considered, leading to the investigation of four different cases. The theoretical analysis is validated by PSPICE simulations and experimental results, accomplished on laboratory prototypes.

97 citations


Journal ArticleDOI
TL;DR: In this paper, a voltage multiplier cell is inserted in the conventional boost converter operated in continuous conduction mode (CCM) to provide another design freedom for the voltage-gain extension, thus, the voltage conversion ratio is enlarged and the narrow turn-off period is avoided in the high step-up applications.
Abstract: In this paper, a voltage multiplier cell is inserted in the conventional boost converter operated in continuous conduction mode (CCM) to provide another design freedom for the voltage-gain extension. Thus, the voltage conversion ratio is enlarged and the narrow turn-OFF period is avoided in the high step-up applications. Furthermore, the voltage multiplier cell makes the voltage stress of all the power devices lower than the high output voltage. As a result, the low-voltage-rated power devices can be employed to reduce the conduction losses and to improve the power device reliability. Moreover, zero-voltage switching soft-switching operation is achieved for the power MOSFETs in the whole-switching transition. Zero-current switching turn-OFF condition is provided for the diodes. Therefore, the power device switching losses and the diode reverse-recovery losses are minimized greatly. In addition, the input current ripple is reduced due to the CCM operation compared with most of the published single-stage single-phase high step-up converters, which makes it more advantageous in the hybrid electric vehicles and the fuel-cell power conversion systems. Finally, the experimental results from a 500-W, 36-380-V prototype are provided to validate the effectiveness of the proposed converter.

93 citations


Journal ArticleDOI
TL;DR: A mm-wave power-harvesting RFID tag is implemented in 90 nm CMOS, which can result in a pinless, CMOS-only tag with no package and no off-chip components whatsoever.
Abstract: A mm-wave power-harvesting RFID tag is implemented in 90 nm CMOS. Operation at mm-wave reduces antenna size and could allow antenna integration on-chip. This, together with power harvesting that can be used in lieu of a battery, can result in a pinless, CMOS-only tag with no package and no off-chip components whatsoever. The tag harvests energy from the incoming mm-wave continuous wave (CW) signal transmitted by the reader and then uses a 60 GHz free-running oscillator to transmit back pulse-width modulated bursts. An in-depth treatment of the voltage multiplier and associated matching network and implications on tag range are presented. With 2 dBm mm-wave input power, the tag achieves a rate of 5 kb/s. The RFIC size is 1.3 × 0.95 mm2 including pads.

92 citations


Journal ArticleDOI
Toru Tanzawa1
TL;DR: This paper compares the performance among two-phase switched-capacitor multipliers to identify the optimum topology with the smallest circuit area and shows that the LIN cell is the best for integration because of the smallest total capacitor area and the highest current efficiency.
Abstract: This paper compares the performance among two-phase switched-capacitor multipliers to identify the optimum topology with the smallest circuit area. The optimum number of stages is calculated for every multiplier to minimize the circuit area under the condition that a certain current is outputted with a given output voltage. Then, the circuit areas of the serial-parallel, linear (LIN), Fibonacci, and 2N multipliers are compared. Results show that the LIN cell is the best for integration because of the smallest total capacitor area and the highest current efficiency under the assumption that the parasitic capacitance is not smaller than 10% of the multiplier capacitance, and the Fibonacci cell is the best for discrete application because of the minimum number of capacitor components with moderate current efficiency under the assumption that the parasitic capacitance is not larger than 1% of the multiplier capacitance.

50 citations


Proceedings ArticleDOI
01 Dec 2010
TL;DR: In this paper, a new class of single-switch non-isolated dc-dc converters with high-voltage gain and reduced semiconductor voltage stress is proposed, which enables the use of a lower voltage and R DS-ON MOSFET switch, which will reduce costs as well as switching and conduction losses.
Abstract: A new class of single-switch non-isolated dc-dc converters with high-voltage gain and reduced semiconductor voltage stress is proposed in this paper. The proposed topologies utilize a voltage multiplier cell and/or hybrid switched-capacitor technique for providing high voltage gain without extreme switch duty-cycle. This enables the use of a lower voltage and R DS-ON MOSFET switch, which will reduce costs as well as switching and conduction losses. The components' voltage ratings and energy volumes of passive components of the proposed converters are greatly reduced compared to other high step-up converters. In addition, the low voltage stress across the diodes allows the use of Schottky rectifiers for alleviating the reverse-recovery current problem, leading to a further reduction in the switching and conduction losses. Other advantages of the proposed topologies include: continuous input/output current, simple structure and control. The principle of operation, theoretical analysis, and performance comparisons between the proposed and other high step-up converters is performed. Experimental results of a 50 W / 240 V dc with 24 V dc input voltage are provided to evaluate the performance of the proposed scheme.

47 citations


Journal ArticleDOI
TL;DR: Measurement results demonstrate that the proposed transformer power-matching and gain-boosting technique greatly improves the power sensitivity and efficiency as compared with widely used LC matching approaches.
Abstract: This paper proposes a transformer power-matching and gain-boosting technique to improve the efficiency of power harvesting of passive wireless microsystems. The proposed method utilizes a step-up transformer inserted between the antenna and voltage multiplier of passive wireless microsystems to perform both impedance transformation for power matching and voltage amplification prior to rectification. The series resistance of the primary winding is minimized using multiple metal layers connected using vias, while the width of the spiral of the secondary winding is made much smaller as compared with that of the primary winding to maximize the turn ratio and minimize its shunt capacitive losses. The detailed analysis of the proposed method and simulation results from Spectre of Cadence Design Systems are presented. The proposed power-matching and gain-boosting network, together with voltage multipliers, has been implemented in TSMC 0.18-m 1.8-V six-metal CMOS technology with thick-metal options. For the purpose of comparison, an LC-power-matching and gain-boosting network with the identical voltage multiplier has also been implemented on the same chip. Measurement results demonstrate that the proposed transformer power-matching and gain-boosting technique greatly improves the power sensitivity and efficiency as compared with widely used LC matching approaches.

40 citations


Proceedings ArticleDOI
14 Mar 2010
TL;DR: In this paper, a clamping diode is added to the original integrated boost-flyback (IBF) topology that naturally clamp these parasitic oscillations, and make the converter operation more similar to that of the IBF converter with voltage multiplier.
Abstract: High step-up ratio converters for low-voltage high-current energy sources are nowadays the focus of an intensive research activity by the power electronics community, thanks to the increasing interest for renewable energy sources like those based on photovoltaic modules and fuel-cells. One interesting topology presented in literature is based on the combination of a boost section and a flyback one, featuring the possibility to boost the output voltage while keeping the switch voltage stress at a reasonable level. However, the basic integrated boost-flyback (IBF) topology suffers of parasitic oscillations caused by the transformer leakage inductances and the diode parasitic capacitance. These oscillations require a suitable dissipative clamp circuit to reduce the diode voltage stress, thus adversely affecting the overall converter efficiency. In this paper, a clamping diode is added to the original IBF topology that naturally clamp these parasitic oscillations, and make the converter operation more similar to that of the IBF converter with voltage multiplier. It is also shown that a resonance occurs that helps to increase the converter's voltage gain. Experimental results taken from a 300W rated prototype are included, showing a good agreement with the theoretical expectations.

38 citations


Journal ArticleDOI
TL;DR: In this article, a high-voltage test system based on a zerovoltage switching series-parallel resonant converter and a three-stage Cockcroft-Walton voltage multiplier rectifier is presented.
Abstract: With the rapid growth of energy generation by regenerative decentralized sources and the continuous replacement of overhead power lines by subterraneous distribution grids, the amount of power supply cables is increasing. In consequence, a large demand for mobile high-voltage cable test systems is expected within the coming years. This contribution deals with modeling and control design of a novel high-voltage test system based on a zero-voltage switching series-parallel resonant converter and a three-stage Cockcroft-Walton voltage multiplier rectifier, generating a true sinus test voltage of 85 kV (rms) at 0.1 Hz. Due to the inherent high dynamics of the power supply as compared to the slowly varying output test voltage, a cascaded control scheme relying on a fast inner current control loop combined with an outer voltage control is established. In order to derive the relevant waveforms, the complex rectifier was significantly simplified to a one-stage voltage doubler rectifier. By applying a suitable generalized averaging method in combination with an extended describing function, a steady-state solution along with the corresponding small signal model can be established, which is utilized for the current control design. The cascaded control strategy using an observer enables substitution of voluminous and costly high-voltage current sensors. The total high-voltage test system was implemented and validated by experimental tests.

32 citations


Journal ArticleDOI
TL;DR: In this article, a new CMOS four-quadrant analog multiplier is proposed for low supply-voltage operation and its power consumption is also very low, which is suitable for low-power analog signal processing applications.
Abstract: A New CMOS four-quadrant analog multiplier is presented in this paper. The proposed multiplier is suitable for low supply-voltage operation and its power consumption is also very low. The proposed circuit has been simulated with the HSPICE and simulation results are given to confirm the feasibility of the proposed analog multiplier. According to the simulation results, under the supply voltage of 1.5 V, the input range of the proposed multiplier can be 120 mV and the corresponding maximum linearity error is less than 3.2%. Moreover, the power dissipation of the proposed circuit is only 6.7 μW. The proposed circuit is expected to be useful in analog signal processing applications.

Journal ArticleDOI
TL;DR: In this paper, a photo multiplier circuit is used to generate multiple voltages to drive the dynodes of the photomultiplier tube to achieve a long lifetime and a high reliability.
Abstract: The described system is developed in the framework of a deep-sea submerged Very Large Volume neutrino Telescope where photons are detected by a large number of Photo Multiplier Tubes. These PMTs are placed in optical modules (OM). A basic Cockcroft-Walton (CW) voltage multiplier circuit design is used to generate multiple voltages to drive the dynodes of the photomultiplier tube. To achieve a long lifetime and a high reliability the dissipation in the OM must be kept to the minimum. The design is also constrained by size restrictions, load current, voltage range, and the maximum allowable ripple in the output voltage. A surface mount PMT-base PCB prototype is designed and successfully tested. The system draws less than 1.5 mA of supply current at a voltage of 3.3 V with outputs up to -1400 Vdc cathode voltage, a factor 10 less than the commercially available state of the art.

Patent
30 Nov 2010
TL;DR: In this paper, a voltage converter is switched among two or more modes to produce an output voltage matching a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes.
Abstract: A voltage converter is switched among two or more modes to produce an output voltage matching a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. The output voltage is compared with the reference voltage to determine whether to adjust the mode.

Proceedings ArticleDOI
19 Nov 2010
TL;DR: This work describes the details of high voltage d.c. power supply whose output is 60kV where as input voltage is 1-Φ 50Hz 5kV of sinusoidal waveform and this test –set is suitable for field testing of high Voltage cables, as prime d.
Abstract: This work describes the details of high voltage d.c. power supply whose output is 60kV where as input voltage is 1-Φ 50Hz 5kV of sinusoidal waveform. This test –set is suitable for field testing of high voltage cables, as prime d.c source for.VLF, OWT and impulse voltage charging unit due to its light weight and portability. In study, we constructed a prototype high voltage power supply based on design, simulation and implementation of hardware work in laboratory. The simulation work has been done by using Mat. Lab. Version 7.0 software.

Patent
21 Jul 2010
TL;DR: In this paper, a step-up converter circuit dynamically increases the direct voltage to the value currently required in the network and in the process temporarily supplies an approximately sinusoidal voltage curve for the intermediate circuit voltage.
Abstract: In an inverter and a method for operating an inverter, the inverter includes a step-up converter circuit, a dynamic intermediate circuit, and a step-down converter circuit for converting a direct voltage of a direct voltage generator or string into an alternating voltage for supplying a network. The step-up converter circuit increases the direct voltage if the latter is lower than a peak-to-peak maximum of the network voltage, and the step-down converter circuit lowers a dynamic intermediate circuit voltage, as needed, to a lower voltage currently required in the network. The step-up converter circuit dynamically increases the direct voltage to the value currently required in the network and in the process temporarily supplies an approximately sinusoidal voltage curve for the intermediate circuit voltage.

Journal ArticleDOI
TL;DR: A novel precision full-wave rectifier using an all-pass filter as a 90° phase shifter that gives a dc output voltage that is almost the same as the peak input voltage over a frequency range of 50 Hz-1 MHz with a very low ripple voltage and low harmonic distortion.
Abstract: In this paper, we have proposed and realized a novel precision full-wave rectifier using an all-pass filter as a 90° phase shifter. The circuit gives a dc output voltage that is almost the same as the peak input voltage over a frequency range of 50 Hz-1 MHz with a very low ripple voltage and low harmonic distortion. Oscilloscope traces of the rectified waveform for the proposed circuit show a ripple voltage of 12 mV obtained with an input voltage of amplitude 1 V and frequency 100 kHz.

Journal ArticleDOI
TL;DR: In this paper, the authors describe a concept and a physical demonstration of a high-efficiency small-size low-cost 100kV 100-kW high-voltage power supply (HVPS) designed for long-pulse applications.
Abstract: This paper describes a concept and a physical demonstration of a high-efficiency small-size low-cost 100-kV 100-kW high-voltage (HV) power supply (HVPS) designed for long-pulse applications (units of milliseconds to dc operation). Key technology includes a modular HV converter with energy-dosing inverters that run at about 50 kHz and have demonstrated an efficiency of 97.5% across a wide range of operating conditions. The inverters' output voltages are phase shifted, which yields a low ripple of 1% and a slew rate of 3 kV/μs combined with less than 10 J of stored energy at the maximum voltage. Modular construction allows easy tailoring of HVPS for specific needs. Owing to high efficiency, small size is achieved without water cooling. Controls provide standard operating features and advanced digital processing capabilities, along with easiness of accommodating application-specific requirements. HVPS design and testing are detailed. It is shown that the ripple factor is inversely proportional to the number of modules squared. Experimental current and voltage waveforms indicate virtually lossless switching for widely varying load in the full range of the line input voltages and fair agreement with circuit simulations. The overall efficiency is as high as 95% at full load and greater than 90% at 20% load, with a power factor that is typically greater than 93%.

Patent
Junji Nishida1
22 Jul 2010
TL;DR: In this paper, a charge pump circuit which steps down an input voltage inputted from an input terminal and outputs it as a step-down output voltage from a stepdown output terminal, and steps up the input voltage and output it as an up-to-date step-up output voltage was presented.
Abstract: A charge pump circuit which steps down an input voltage inputted from an input terminal and outputs it as a step-down output voltage from a step-down output terminal, and steps up the input voltage and outputs it as a step-up output voltage from a step-up output terminal, includes: a voltage conversion circuit having a flying capacitor, a step-down output capacitor, a step-up output capacitor, and a plurality of switches, wherein the flying capacitor, the step-down output capacitor, the step-up output capacitor, and the switches are connected, and the voltage conversion circuit is capable of switching connection states by switching each on/off state of the switches; an output voltage detection circuit unit which makes a comparison of a voltage between the step-down output voltage and a first predetermined voltage, and makes a comparison of a voltage between the step-up output voltage and a second predetermined voltage, and produces and outputs each signal indicating each result of the comparisons; and a control circuit unit which performs a switching control depending on each signal outputted from the output voltage detection circuit unit.

Patent
Marco Cassia1
28 Jul 2010
TL;DR: In this article, a switch, a peak voltage detector and a control voltage generator are used to detect the peak voltage of an input signal provided to the switch, and then the generator generates a variable control voltage to turn off the switch.
Abstract: Switches with variable control voltages and having improved reliability and performance are described. In an exemplary design, an apparatus includes a switch, a peak voltage detector, and a control voltage generator. The switch may be implemented with stacked transistors. The peak voltage detector detects a peak voltage of an input signal provided to the switch. In an exemplary design, the control voltage generator generates a variable control voltage to turn off the switch based on the detected peak voltage. In another exemplary design, the control voltage generator generates a variable control voltage to turn on the switch based on the detected peak voltage. In yet another exemplary design, the control voltage generator generates a control voltage to turn on the switch and attenuate the input signal when the peak voltage exceeds a high threshold.

Patent
05 Mar 2010
TL;DR: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator as mentioned in this paper.
Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

Journal ArticleDOI
TL;DR: In this paper, a dual-mode phase shift modulation control scheme for series resonant inverter fed voltage multiplier (VM) based X-ray power supply is proposed, where the output voltage of the power supply was controlled by varying the phase-shift between the output voltages of two inverters.
Abstract: This paper proposes a dual-mode phase-shift modulation control scheme for series resonant inverter fed voltage multiplier (VM) based X-ray power supply. In this control scheme the outputs voltage of two parallel connected series resonant inverters are mixed before supplying to VM circuit. The output voltage of the power supply is controlled by varying the phase-shift between the output voltages of two inverters. In order to achieve quick rise of output voltage, the power supply is started with zero phase-shift and as the output voltage reaches 90% of the target voltage, the phase-shift is increased to a value which corresponds to target output voltage to prevent overshoot. The proposed control scheme has been shown to have good performance. Experimental results based on the scaled-down laboratory prototype are presented to validate the effectiveness of proposed dual-mode phase shift modulation control scheme.

Patent
11 May 2010
TL;DR: In this article, a voltage converter includes a plurality of capacitors and corresponding first switch elements, the capacitors coupled in series and arranged to each charge to a voltage level during a first clock period, the voltage level determined by a supply voltage level, the number of capacators and a value of each capacitor.
Abstract: A voltage converter includes a plurality of capacitors and corresponding first switch elements, the capacitors coupled in series and arranged to each charge to a voltage level during a first clock period, the voltage level determined by a supply voltage level, the number of capacitors and a value of each capacitor; and a plurality of second switch elements configured to cause the plurality of capacitors to be connected in parallel and to discharge into an output capacitor during a second clock period, the output capacitor charged to a discrete voltage output level so that the output capacitor provides the discrete voltage output level, wherein the discrete voltage output level is less than the supply voltage level and wherein the discrete voltage output level is used to develop a bias signal that is supplied to a power amplifier element.

Proceedings ArticleDOI
A. Vaz1, Hector Solar1, I. Rebollo, Íñigo Gutiérrez1, Roc Berenguer1 
23 May 2010
TL;DR: A long range, low power UHF RFID analog front-end suitable for batteryless wireless sensors has been designed using a low cost 0.35µm CMOS standard process and the implemented voltage multiplier uses Schottky diodes to provide efficiencies higher than 35%.
Abstract: A long range, low power UHF RFID analog front-end suitable for batteryless wireless sensors has been designed using a low cost 0.35µm CMOS standard process. The proposed front-end architecture allows the implementation of power management techniques that together with the power optimized blocks such as voltage limiter, ASK demodulator… provides a long reading range. The implemented voltage multiplier uses Schottky diodes to provide efficiencies higher than 35%. The measured UHF RFID analog front-end current consumption is 7.4µA. When assembling the analog front-end to a matched dipole antenna, the analog front-end would be able to provide a wireless communication up to 2.4m, from a 2W EIRP output power reader to a digital module + sensor, with an average power consumption up to 37.5µW. These characteristics allow the use of the proposed analog front-end in batteryless wireless sensor networks.

Patent
24 Sep 2010
TL;DR: A circuit providing reliable voltage isolation between a low and high voltage sides of a circuit while allowing AC power transfer between the low-and high-voltage sides of the circuit to an x-ray tube filament is described in this paper.
Abstract: A circuit providing reliable voltage isolation between a low and high voltage sides of a circuit while allowing AC power transfer between the low and high voltage sides of the circuit to an x-ray tube filament. Capacitors provide the isolation between the low and high voltage sides of the circuit.

Proceedings Article
01 Jan 2010
TL;DR: In this paper, the authors describe how the power efficiency of fully integrated Dickson charge pumps in advanced smart power technologies can be improved considerably by implementing charge recycling techniques and the replacement of normal PN junction diodes by pulse-driven active Diodes.
Abstract: This paper describes how the power efficiency of fully integrated Dickson charge pumps in advanced smart power technologies can be improved considerably by implementing charge recycling techniques and the replacement of normal PN junction diodes by pulse-driven active diodes. These 2 methods are first analyzed and compared on a purely theoretical basis and are verified with experimental data afterwards. Measurements reveal that the combination of the 2 methods can boost the power efficiency by a factor of 2 compared to traditional Dickson charge pump designs.

Proceedings ArticleDOI
21 Jun 2010
TL;DR: In this paper, a current-fed push-pull boost converter with voltage doubler (CFBCVD) is presented, which has a non-pulsating input current, recovery of the secondary leakage energy, low output capacitor current ripple, much lower rectifier diode voltage stress, and much higher voltage gain.
Abstract: By integrating a novel voltage doubler rectifier with a classical current-fed converter, a current-fed push-pull boost converter with voltage doubler (CFBCVD) is presented. In addition to having a non-pulsating input current, recovery of the secondary leakage energy, low output capacitor current ripple, much lower rectifier diode voltage stress, and much higher voltage gain can be obtained. These characteristics make it desirable for high frequency high efficiency high output-voltage applications. To demonstrate its feasibility, a 150 kHz, 36–75V input and 400V/400W output power converter is implemented and tested.

Patent
21 Apr 2010
TL;DR: In this paper, a system for generating high-stability high voltage, which belongs to the technical field of a high-voltage generator, has been presented, where a circuit structure consisting of a switch conversion circuit, a high ratio transformer, a voltage multiplier, a feedback sampling circuit and a frequency-adjustable PWM control circuit is described.
Abstract: The invention discloses a system for generating high-stability high voltage, which belongs to the technical field of a high-voltage generator. A circuit structure of the system comprises a switch conversion circuit, a high-ratio transformer, a voltage multiplier, a feedback sampling circuit and a frequency-adjustable PWM control circuit, wherein the transformer is provided with a primary side and a secondary side; and the primary side is connected to a high-frequency wave output end of the switch conversion circuit, and is a series-parallel resonant circuit consisting of a resonant inductor Ls, a resonant capacitor Cs and an equivalent parallel resonant capacitor Cp of the high-ratio transformer. The system reduces the adverse impact of parasitic parameters of the transformer, improves the high-frequency operating frequency of the circuit, reduces the voltage drop of the pulsation and load of an output voltage, strengthens the stability of the output high voltage obviously, realizes a soft-switch operating mode by adjusting circuit operating points, further strengthens the stability of the output high voltage, improves operating frequency, reduces the volume of magnetic elements, and reduces the occupied space of the system obviously.

Patent
28 Dec 2010
TL;DR: In this paper, a system and method for transforming AC voltage to a high-frequency AC voltage and providing the high frequency AC voltage voltage to an AC LED circuit or rectifying the highfrequency circuit to a DC voltage and then providing the DC voltage to DC LED circuit is presented.
Abstract: A system and method transforming AC voltage to a high-frequency AC voltage and providing the high-frequency AC voltage to an AC LED circuit or rectifying the high-frequency circuit to a DC voltage and providing the DC voltage to a DC LED circuit.

Journal ArticleDOI
TL;DR: In this paper, a low voltage bulk-driven class AB four quadrant current multiplier is proposed and the drain current equations for NMOS and PMOS transistors of the proposed cell have been derived.
Abstract: In this paper a low voltage bulk-driven class AB four quadrant current multiplier is proposed. For the proposed multiplier a bulk-driven class AB current mode cell has been developed and the drain current equations for NMOS and PMOS transistors of the proposed cell have been derived. This cell is used as a basic building block for bulk-driven low voltage current squarer and copier circuit, which is finally used as the fundamental building block of the proposed low-voltage bulk-driven current multiplier operating at ±1 V. All the circuits are simulated using SPICE for 0.25 μm CMOS technology.

Patent
04 Jan 2010
TL;DR: In this article, a power conditioning circuit in a light bulb efficiently converts an Alternating Current (AC) input voltage into Direct Current (DC) power for operating LEDs in the light bulb.
Abstract: A power conditioning circuit in a light bulb efficiently converts an Alternating Current (AC) input voltage into Direct Current (DC) power for operating LEDs in the light bulb. The power conditioning circuit discharges capacitors when a voltage level of the input voltage drops below a given voltage necessary to operate the LEDs. The capacitors are then recharged when the input voltage is high enough to power the LED. The capacitors are configured to operate as voltage dividers while being charged thus reducing a peak voltage level of the output voltage used for powering the LEDs. The reduced output voltage reduces the overall amount of energy used by the light bulb and reduces the amount of heat radiated by the light bulb.