K
Keshab K. Parhi
Researcher at University of Minnesota
Publications - 768
Citations - 21763
Keshab K. Parhi is an academic researcher from University of Minnesota. The author has contributed to research in topics: Decoding methods & Adaptive filter. The author has an hindex of 68, co-authored 749 publications receiving 20097 citations. Previous affiliations of Keshab K. Parhi include University of California, Berkeley & University of Warwick.
Papers
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Proceedings ArticleDOI
Interleaved cyclic redundancy check (CRC) code
Jun Jin Kong,Keshab K. Parhi +1 more
TL;DR: This paper investigates interleaved cyclic redundancy check (CRC) code, which can be obtained by merging independent small message blocks into one large block or by dividing the original message block into independent small sub blocks (divided interleaving) and then by alternatively dividing the resulting message block(s) using same generator polynomial.
Proceedings ArticleDOI
Loop list scheduler for DSP algorithms under resource constraints
C.-Y. Wang,Keshab K. Parhi +1 more
TL;DR: A new algorithm for resource-constrained scheduling for DSP applications that exploits inter-iteration precedence constraints, and incorporates implicit retiming and pipelining in generating optimal and near optimal schedules.
Journal ArticleDOI
Molecular and DNA Artificial Neural Networks via Fractional Coding
Xingyi Liu,Keshab K. Parhi +1 more
TL;DR: Molecular perceptrons that can handle arbitrary weights and can compute sigmoid of the weighted sums are presented and are ideal for regression applications and multi-layer ANNs.
Proceedings ArticleDOI
Synthesis of correlated bit streams for stochastic computing
TL;DR: This paper presents a general approach to synthesize correlated stochastic bit streams for specified probabilities and specified correlation coefficients and shows that these match with the theoretical pdfs of the outputs.
Proceedings ArticleDOI
Implementation of scalable elliptic curve cryptosystem crypto-accelerators for GF(2/sup m/)
Aaron E. Cohen,Keshab K. Parhi +1 more
TL;DR: It is shown that reconfigurability with the reduction polynomial significantly benefits from the addition of a low latency divider unit and scalar point multiplication in affine coordinates.