비만아 부모의 돌봄 경험: q 방법론

After two decades of research and development, elliptic curve cryptography now has widespread exposure and acceptance. Industry, banking, and government standards are in place to facilitate extensive deployment of this efficient public-key mechanism. Anchored by a comprehensive treatment of the practical aspects of elliptic curve cryptography (ECC), this guide explains the basic mathematics, describes state-of-the-art implementation methods, and presents standardized protocols for public-key encryption, digital signatures, and key establishment. In addition, the book addresses some issues that arise in software and hardware implementation, as well as side-channel attacks and countermeasures. Readers receive the theoretical fundamentals as an underpinning for a wealth of practical and accessible knowledge about efficient application. Features & Benefits: * Breadth of coverage and unified, integrated approach to elliptic curve cryptosystems * Describes important industry and government protocols, such as the FIPS 186-2 standard from the U.S. National Institute for Standards and Technology * Provides full exposition on techniques for efficiently implementing finite-field and elliptic curve arithmetic* Distills complex mathematics and algorithms for easy understanding* Includes useful literature references, a list of algorithms, and appendices on sample parameters, ECC standards, and software toolsThis comprehensive, highly focused reference is a useful and indispensable resource for practitioners, professionals, or researchers in computer science, computer engineering, network design, and network data security.

https://cdn.preterhuman.net/texts/cryptography/Hankerson,%20Menezes,%20Vanstone.%20Guide%20to%20elliptic%20curve%20cryptography%20(Springer,%202004)(ISBN%20038795273X)(332s)_CsCr_.pdf

Guide to Elliptic Curve Cryptography

National Institute of Standards and Technology における超伝導研究及び生活

Most of the signal processing that we will study in this course involves local operations on a signal, namely transforming the signal by applying linear combinations of values in the neighborhood of each sample point. You are familiar with such operations from Calculus, namely, taking derivatives and you are also familiar with this from optics namely blurring a signal. We will be looking at sampled signals only. Let's start with a few basic examples. Local difference Suppose we have a 1D image and we take the local difference of intensities, DI(x) = 1 2 (I(x + 1) − I(x − 1)) which give a discrete approximation to a partial derivative. (We compute this for each x in the image.) What is the effect of such a transformation? One key idea is that such a derivative would be useful for marking positions where the intensity changes. Such a change is called an edge. It is important to detect edges in images because they often mark locations at which object properties change. These can include changes in illumination along a surface due to a shadow boundary, or a material (pigment) change, or a change in depth as when one object ends and another begins. The computational problem of finding intensity edges in images is called edge detection. We could look for positions at which DI(x) has a large negative or positive value. Large positive values indicate an edge that goes from low to high intensity, and large negative values indicate an edge that goes from high to low intensity. Example Suppose the image consists of a single (slightly sloped) edge:

http://ieeexplore.ieee.org/iel5/5/31307/01456462.pdf

Linear systems

Ad hoc wireless networks enable new and exciting applications, but also pose significant technical challenges. In this article we give a brief overview of ad hoc wireless networks and their applications with a particular emphasis on energy constraints. We then discuss advances in the link, multiple access, network, and application protocols for these networks. We show that cross-layer design of these protocols is imperative to meet emerging application requirements, particularly when energy is a limited resource.

Design challenges for energy-constrained ad hoc wireless networks

A Physical Unclonable Function (PUF) using capacitor mismatch in a standard successive approximation register analog-to-digital converter (SAR-ADC) as the entropy source is demonstrated in 65nm CMOS. SAR-ADCs are readily available in many system-on-chips, making the hardware overhead of the proposed PUF almost negligible. The inherent process variation of metal-oxide-metal (MOM) capacitors is harnessed through a charge redistribution operation which is sampled by the voltage comparator. To enhance the stability of the PUF output, soft response generation and dynamic thresholding techniques were adopted. Finally, we verify that performing the enrollment operation at a lower operating voltage can ensure that PUF responses are stable at the nominal supply voltage used during authentication.

A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC

CORDIC-based cascade orthogonal infinite-impulse response (IIR) digital filters possess desirable properties for VLSI implementations such as local connection, regularity, absence of limit cycle and overflow oscillations, and good finite word-length behavior. However, the achievable sample rate of these filters is limited, since these structures cannot be pipelined at finer levels (such as bit or multi-bit level) due to the presence of feedback loops. In this paper, we present a novel approach to design pipelined CORDIC-based cascade orthogonal IIR digital filters using the transfer function approach. We first present a systematic way to synthesize cascade orthogonal IIR digital filters using scalar lossless inverse scattering theory, and realize the filter transfer function as a cascade inter-connection of orthogonal sections where each section implements one real zero or a pair of complex conjugate zeroes of the transfer function. In this way, the filter achieves low sensitivity over the entire filter spectrum. Novel pipelining techniques for both coarse-grain and fine-grain pipelining of these filters are then proposed. In coarse-grain pipelining, we present a novel method based on retiming and orthogonal matrix decomposition techniques which can increase the maximum filter sample rate to O(1) level which is independent of the filter order. In fine-grain pipelining, we present a novel method based on constraint filter design and polyphase decomposition techniques which could increase the maximum filter sample rate to any desired level. The proposed architecture for coarse-grain pipelining consists of only Givens rotations, and the one for fine-grain pipelining consists of only Givens rotations and a few additions. Both architectures can be realized using CORDIC arithmetic-based processors. Finally, finite word-length simulations are carried out to compare the performance of different topologies.

Pipelined CORDIC-based cascade orthogonal IIR digital filters

/pdf/dsp-based-equalization-for-dsp-based-equalization-for-44jxl9p93w.pdf

DSP-Based Equalization for DSP-Based Equalization for Optical Channels

Elliptic curve cryptography invented in the 1980's and the Advanced Encryption Standard (AES) standardized in 2002 have become important research topics in security because the advances in modern computing systems have allowed attacks on older cryptographic schemes to be achieved in a shorter period of time. Elliptic curve cryptography is the fundamental mathematical building block for elliptic curve cryptosystems. Elliptic curve cryptosystems are expected to replace the aging RSA cryptosystem which is currently deployed in e-commerce, banking, secure voice over Internet protocol (VoIP), secure sockets layer (SSL), and virtual private network (VPN). Likewise, the AES cryptosystem has replaced the aging Data Encryption Standard (DES) and Triple-DES cryptosystems found in similar applications. In the future, Internet protocol television (IPTV), and secure voice and video over Internet protocol (V 2oIP) are expected to require these newer cryptosystems. Due to the nature of a broad range of applications from secure VoIP to e-commerce, each application requires different elliptic curve cryptographic accelerators and AES accelerators to meet its particular design constraints. 
This thesis considers various VLSI implementation issues of AES and elliptic curve cryptography accelerators for Galois fields defined by large primes (p) represented as GF(p) and Galois fields defined by irreducible polynomials of degree (m ) represented by GF(2m) and develops novel approaches to improving performance, reducing area, implementing reconfigurable architecture design, and designing for side channel attack resistance. 
We implemented two reconfigurable elliptic curve cryptography accelerators. One was designed for low power applications while the other was designed for high throughput applications. They achieved speedups of 1.24 and 56 respectively. Then, we investigated the area time complexity tradeoff for various implementation approaches to elliptic curve cryptography accelerator implementations. We found that a designer can indeed approximate the required area for a given performance requirement before implementation due to the O(m3) area-time product. We investigated high performance reconfigurable systems for changing the reduction polynomial in GF(2m) and determined that an approach based on systematic reduction performed best (approximately 37% faster than Barrett or Montgomery reduction). 
We propose a novel greedy dual base decomposition algorithm for pre-computation of the scalar in the scalar point multiplication method. This method achieves a significant performance improvement (up to 31%) over standard approaches. 
We propose a novel side channel resistant least significant bit (LSB) invariant scalar point multiplication method that can use pre-computation to reduce the complexity for multiple scalar point multiplications on the same base point. It can achieve performance of almost twice the speed of Montgomery's invariant method. We proposed a novel fault tolerant parity prediction method for the AES substitution box based on composite fields that reduces the logic complexity by 70 to 80%. We proposed a novel metric for side channel resistance that shows the relationship between the mean and the standard deviation when achieving 280 level security.

Architectures for cryptography accelerators

CORDIC (COordinate Rotation Digital Computer) is an iterative algorithm for the calculation of the rotation of a two-dimensional vector, in linear, circular or hyperbolic coordinate systems, using only add and shift operations. This paper presents a novel algorithm and architecture for the rotation-mode in circular and hyperbolic coordinate systems in which the directions of all micro-rotations are pre-computed while maintaining a constant scale factor. Thus, an examination of the sign of the angle after each iteration is no longer required. By using a redundant adder, the critical path (without scaling and conversion) of the entire CORDIC architecture only requires (1.5n+2) full-adders (n corresponds to the word-length of the inputs) for rotation mode. This is a speed improvement of about 20% compared to the previously fastest reported rotation mode implementations. Additionally, there is a higher degree of freedom in choosing the pipeline cutsets due to the novel feature of independence of the iterations i and i-1 in the CORDIC rotation. Optional pipelining can lead for example in the rotation mode to an on-line delay of three clock cycles including scaling and conversion, where every clock cycle corresponds to a delay of twelve full-adders.

Keshab K. Parhi

Papers

A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC

Pipelined CORDIC-based cascade orthogonal IIR digital filters

DSP-Based Equalization for DSP-Based Equalization for Optical Channels

Architectures for cryptography accelerators

A novel CORDIC rotation method for generalized coordinate systems