S
Shom Ponoth
Researcher at IBM
Publications - 147
Citations - 2342
Shom Ponoth is an academic researcher from IBM. The author has contributed to research in topics: Layer (electronics) & Dielectric. The author has an hindex of 26, co-authored 147 publications receiving 2282 citations. Previous affiliations of Shom Ponoth include Commissariat à l'énergie atomique et aux énergies alternatives.
Papers
More filters
Proceedings ArticleDOI
Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
Kangguo Cheng,Ali Khakifirooz,Pranita Kulkarni,Shom Ponoth,J. Kuss,Davood Shahrjerdi,Lisa F. Edge,A. Kimball,S. Kanakasabapathy,K. Xiu,Stefan Schmitz,Alexander Reznicek,Thomas N. Adam,H. He,Nicolas Loubet,S. Holmes,Sanjay Mehta,D. Yang,A. Upham,Soon-Cheon Seo,J. L. Herman,R. Johnson,Yu Zhu,Paul C. Jamison,Bala S. Haran,Z. Zhu,L. H. Vanamurth,Su Chen Fan,D. Horak,Huiming Bu,Philip J. Oldiges,Devendra K. Sadana,P. Kozlowski,D. McHerron,James A. O’Neill,Bruce B. Doris +35 more
TL;DR: In this paper, the authors present a new ETSOI CMOS integration scheme that incorporates all benefits from their previous unipolar work, and demonstrate NFET and PFET drive currents of 640 and 490 µA/µm, respectively, at I off = 300 pA/m, V DD = 0.9V, and L G = 25nm.
Proceedings ArticleDOI
High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
Qing Liu,M. Vinet,J. Gimbert,Nicolas Loubet,Romain Wacquez,L. Grenouillet,Y. Le Tiec,Ali Khakifirooz,Toshiharu Nagumo,Kangguo Cheng,H. Kothari,Chanemougame Daniel,F. Chafik,S. Guillaumet,J. Kuss,Frederic Allibert,Gen Tsutsui,James Chingwei Li,Pierre Morin,Swati Mehta,R. Johnson,Lisa F. Edge,Shom Ponoth,T. Levin,S. Kanakasabapathy,Balasubramanian S. Pranatharthi Haran,Huiming Bu,J. L. Bataillon,Olivier Weber,O. Faynot,Emmanuel Josse,Michel Haond,Walter Kleemeier,Mukesh Khare,T. Skotnicki,Scott Luning,Bruce B. Doris,M. Celik,R. Sampson +38 more
TL;DR: Electrostatics are obtained, demonstrating the scalability of these devices to14nm and beyond, and BTI was improved >20% vs a comparable bulk device and evidence of continued scalability beyond 14nm is provided.
Proceedings ArticleDOI
UTBB FDSOI transistors with dual STI for a multi-V t strategy at 20nm node and below
L. Grenouillet,M. Vinet,J. Gimbert,Bastien Giraud,Jean-Philippe Noel,Qing Liu,Prasanna Khare,Marie-Anne Jaud,Y. Le Tiec,Romain Wacquez,T. Levin,P. Rivallin,S. Holmes,Sen Liu,Kangguo Chen,O. Rozeau,P. Scheiblin,Erin Mclellan,M. Malley,J. Guilford,A. Upham,R. Johnson,M. Hargrove,T. Hook,Stefan Schmitz,Sanjay Mehta,J. Kuss,Nicolas Loubet,Sean Teehan,M. Terrizzi,Shom Ponoth,Kangguo Cheng,T. Nagumo,Ali Khakifirooz,Frederic Monsieur,Pranita Kulkarni,R. Conte,James J. Demarest,O. Faynot,Walter Kleemeier,Scott Luning,Bruce B. Doris +41 more
TL;DR: It is demonstrated in 20nm ground rules that Vt is able to tune by more than 400mV, that transistor performance can be boosted by up to 30% and that Ioff can be controlled over 3 decades by allowing more than VDD/2 to be applied on the back gate.
Proceedings ArticleDOI
Ultra-thin-body and BOX (UTBB) fully depleted (FD) device integration for 22nm node and beyond
Qing Liu,Atsushi Yagishita,Nicolas Loubet,Ali Khakifirooz,Pranita Kulkarni,T. Yamamoto,Kangguo Cheng,M. Fujiwara,Jin Cai,D. Dorman,Swati Mehta,Prasanna Khare,K. Yako,Yu Zhu,S. M. Mignot,S. Kanakasabapathy,Stephane Monfray,Frederic Boeuf,Charles W. Koburger,Hiroshi Sunamura,Shom Ponoth,Alexander Reznicek,Balasubramanian S. Pranatharthi Haran,A. Upham,R. Johnson,Lisa F. Edge,J. Kuss,T. Levin,N. Berliner,Effendi Leobandung,Thomas Skotnicki,Masami Hane,Huiming Bu,Kazunari Ishimaru,Walter Kleemeier,Mariko Takayanagi,Bruce B. Doris,R. Sampson +37 more
TL;DR: In this paper, a gate length of 25nm and competitive drive currents of 1.27 mV·µm were achieved by using a gate-first high-k/metal and raised source/drains (RSD).
Patent
Sealed air gap for semiconductor chip
TL;DR: In this paper, a semiconductor chip including a substrate, a gate within the dielectric layer, the gate including a sidewall, a contact contacting a portion of the gate, and a sealed air gap between the sidewall and the contact is described.