Showing papers by "Tsunenobu Kimoto published in 2009"

Reduction of Deep Levels and Improvement of Carrier Lifetime in n-Type 4H-SiC by Thermal Oxidation

Abstract: Significant reduction of major deep levels in n-type 4H-SiC(0001) epilayers by means of thermal oxidation is demonstrated. By thermal oxidation of epilayers at 1150–1300 °C, the concentration of the Z1/2 and EH6/7 centers has been reduced from (0.3–2)×1013 cm-3 to below the detection limit (1×1011 cm-3). The depth-profile analysis of the Z1/2 center has revealed that the Z1/2 center is eliminated to a depth of about 50 µm from the surface after thermal oxidation at 1300 °C for 5 h. The carrier lifetime in an n-type 4H-SiC epilayer measured by differential microwave photoconductance decay has been significantly improved from 0.73 µs (as-grown) to 1.62 µs (after oxidation: 1300 °C, 5 h×2). The reduction mechanism of the Z1/2 and EH6/7 centers is discussed.

Elimination of the Major Deep Levels in n- and p-Type 4H-SiC by Two-Step Thermal Treatment

Abstract: By thermal oxidation of 4H-SiC at 1150–1300 °C, the Z1/2 and EH6/7 concentrations can be reduced to below 1×1011 cm-3. By the oxidation, however, a high concentration of HK0 center (EV + 0.78 eV) is generated. Additional annealing in Ar at 1550 °C results in elimination of the HK0 center. Thus, all the major deep levels can be eliminated by the two-step thermal treatment. Based on the depth profiles of deep levels, a model for the defect generation and elimination is proposed. The carrier lifetime in 4H-SiC epilayers has been improved from 0.64 (as-grown) to 4.52 µs by this method.

Measuring Terminal Capacitance and Its Voltage Dependency for High-Voltage Power Devices

Abstract: The switching behavior of semiconductor devices responds to charge/discharge phenomenon of terminal capacitance in the device. The differential capacitance in a semiconductor device varies with the applied voltage in accordance with the depleted region thickness. This study develops a C - V characterization system for high-voltage power transistors (e.g., MOSFET, insulated gate bipolar transistor, and JFET), which realizes the selective measurement of a specified capacitance from among several capacitances integrated in one device. Three capacitances between terminals are evaluated to specify device characteristics-the capacitance for gate-source, gate-drain, and drain-source. The input, output, and reverse transfer capacitance are also evaluated to assess the switching behavior of the power transistor in the circuit. Thus, this paper discusses the five specifications of a C -V characterization system and its measurement results. Moreover, the developed C -V characterization system enables measurement of the transistor capacitances from its blocking condition to the conducting condition with a varying gate bias voltage. The measured C -V characteristics show intricate changes in the low-bias-voltage region, which reflect the device structure. The monotonic capacitance change in the high-voltage region is attributable to the expansion of the depletion region in the drift region. These results help to understand the dynamic behavior of high-power devices during switching operation.

Temperature and doping dependencies of electrical properties in Al-doped 4H-SiC epitaxial layers

Abstract: The free hole concentration and the low-field transport properties of Al-doped 4H-SiC epilayers with several acceptor concentrations grown on semi-insulating substrates have been investigated in the temperature range from 100to500K by Hall-effect measurements. Samples have been grown by cold-wall chemical vapor deposition (CVD) in the Al acceptor concentration range from 3×1015to5.5×1019cm−3. The dependencies of the acceptor ionization ratio at 300K and the ionization energy on the acceptor concentration were estimated. Numerical calculations of the hole Hall mobility and the Hall scattering factor have been performed based on the low-field transport model using relaxation-time approximation. At the low acceptor concentrations, the acoustic phonon scattering dominates the hole mobility at 300K. At the high acceptor concentrations, on the other hand, the neutral impurity scattering dominates the mobility. A Caughey–Thomas mobility model with temperature dependent parameters is used to describe the dependen...

4H-SiC MISFETs with nitrogen-containing insulators

Abstract: 4H-SiC MISFETs with nitrogen-containing insulators have been fabricated and characterized. Several techniques have been explored to incorporate nitrogen in the gate insulator in order to improve the density of interface states and thereby the channel mobility. The techniques are N2O-grown oxides, the oxidation of a surface layer co-implanted with N+ and Al+, deposited SiO2 annealed in N2O and NO, and deposited SiNx /SiO2 annealed in N2O. By optimizing the formation process of the gate insulators, MIS capacitors with N-containing insulators have demonstrated an interface state density close to the conduction band edge below 2 × 1011 cm–2 eV–1 which is one or two orders-of-magni- tude lower than that of MOS capacitors with oxides grown in dry O2. The channel mobility of the n-channel 4H-SiC(0001) MISFETs with N-containing insulators is increased to about 30 cm2/Vs. In addition, an even higher channel mobility of 50 cm2/Vs has been realized by utiliz- ing N-containing insulators adequately processed on the 4H-SiC (000) face. From the experimental results, the dominant scattering mechanisms in SiC MISFETs have been identified; Coulomb scattering and electron trapping at interface states dominate the channel mobility in SiC MOSFETs with thermally-grown and deposited SiO2. The application of N-containing insulators to p-channel 4H-SiC MIS devices is also discussed. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Detection and depth analyses of deep levels generated by ion implantation in n- and p-type 4H-SiC

Abstract: The authors investigated deep levels in the whole energy range of bandgap of 4H-SiC, which are generated by low-dose N+, P+, and Al+ implantation, by deep level transient spectroscopy (DLTS). Ne+-implanted samples have been also prepared to investigate the pure implantation damage. In the n-type as-grown material, the Z1∕2 (EC−0.63eV) and EH6∕7 (EC−1.6eV) centers are dominant deep levels. At least, seven peaks (IN1, IN3–IN6, IN8, and IN9) have emerged by implantation and annealing at 1000°C in the DLTS spectra from all n-type samples, irrespective of the implanted species. After high-temperature annealing at 1700°C, however, most DLTS peaks disappeared, and two peaks, IN3 and IN9, which may be assigned to Z1∕2 and EH6∕7, respectively, survive with a high concentration over the implanted atom concentration. In the p-type as-grown material, the D (EV+0.40eV) and HK4 (EV+1.4eV) centers are dominant. Two peaks (IP1 and IP3) have emerged by implantation and annealing at 1000°C, and four traps IP2 (EV+0.39eV), ...

Triple Shockley type stacking faults in 4H-SiC epilayers

Abstract: 4H-SiC epilayers have been characterized by microphotoluminescence (micro-PL) spectroscopy and micro-PL intensity mapping at room temperature. A type of stacking fault (SF) with a peak emission wavelength at 480 nm (2.58 eV) has been identified. The shape of this SF is triangular revealed by the micro-PL intensity mapping. Conventional and high-resolution transmission electron microscopies have been carried out to investigate the structure of this SF. Its stacking sequence is determined as (3,5) in Zhdanov’s notation, which is consistent with that of the triple Shockley SF. The formation mechanism of this SF is also discussed.

Characterization of major in-grown stacking faults in 4H-SiC epilayers

Abstract: The optical properties of major in-grown stacking faults (IGSFs) in 4H-SiC epilayers have been characterized by micro-photoluminescence (micro-PL) spectroscopy and its intensity mapping. Strong PL emissions from the IGSFs are observed even at room temperature. Three kinds of IGSFs have been identified in the samples based on the micro-PL spectra. Each kind of IGSF shows the distinct PL emission peak located at 460, 480, and 500 nm, respectively. The micro-PL intensity mapping at the emission band of each IGSF has been performed to spatially profile the IGSF. The shapes, distributions, and densities of IGSFs in the epilayers are then presented. The microstructure of each IGSF has been revealed by high-resolution transmission electron microscopy observations. The stacking sequences of three IGSFs are determined as (4,4), (3,5), and (6,0) in the Zhdanov's notation, respectively, which apparently differ from the perfect 4H-SiC, (2,2). Three identified IGSFs are then classified as quadruple Shockley SFs, triple Shockley SFs, and double Shockley SFs, respectively, based on the shear formation model.

Electrical Characterization of MOS Structures with Deposited Oxides Annealed in N2O or NO

Abstract: In this work, the electrical characteristics and the reliability of 80nm thick deposited oxides annealed in NO and N2O on the 4H-SiC Si-face for gate oxide application in MOS devices is analyzed by C-V, I-V measurements and by constant current stress. Compared to thermally grown oxides, the deposited oxides annealed in N2O or NO showed improved electrical properties. Dit-values lower than 1011cm-2eV-1 have been achieved for the NO sample. The intrinsic QBD-values of deposited and annealed oxides are one order of magnitudes higher than the highest values reported for thermally grown oxides. Also MOSFETS were fabricated with a channel mobility of 20.05 cm2/Vs for the NO annealed deposited oxide. Furthermore annealing in NO is preferred to annealing in N2O regarding µFE- and QBD-values.

Mobility oscillation by one-dimensional quantum confinement in Si-nanowire metal-oxide-semiconductor field effect transistors

Abstract: Si-nanowire p-channel metal-oxide-semiconductor field effect transistors (MOSFETs), in which the typical cross section of the nanowire is a rectangular shape with 3 nm height and 18 nm width, have been fabricated and the current-voltage characteristics have been measured from 101 to 396 K. The transconductance has shown oscillation up to 309 K. The carrier transport has been theoretically analyzed, assuming that the acoustic phonon scattering is dominant. The electronic states have been determined from the effective mass approximation and the mobility from the relaxation time approximation as a function of the Fermi level. Relation between the gate voltage and the Fermi level has been estimated from the MOSFET structure. The calculated mobility has shown the oscillation with change in the Fermi level (the gate voltage), resulting in the transconductance oscillation. The oscillation originates from one-dimensional density of states (∝E−0.5).

Systematic Investigation of c-Axis Tilt in GaN and AlGaN Grown on Vicinal SiC(0001) Substrates

Abstract: High-resolution X-ray diffraction measurements of GaN and AlGaN grown on 4H- and 6H-SiC(0001) vicinal substrates with misorientation angles of up to 9° are presented. Growth of (Al)GaN was carried out by plasma-assisted molecular beam epitaxy. The c-axis tilt, i.e., inclination of the (Al)GaN c-axis relative to that of SiC, was systematically investigated. The inclination angle clearly depended on the SiC substrate misorientation angle, while it was independent of the (Al)GaN growth temperature, SiC polytype, and substrate misorientation direction. The behavior observed for both GaN and AlGaN is in excellent agreement with the model proposed previously by Nagai for the InGaAs/GaAs system.

Electronic properties of finite‐length silicon carbide nanotubes

Abstract: The electronic properties of silicon carbide nanotubes (SiCNT) as a function of length, were investigated by means of density functional theory (DFT). We found that the increasing nanotube length yields a higher localization of the lowest unoccupied and highest occupied molecular orbitals (LUMO and HOMO), thus affecting the behavior of the band gap and chemical reactivity of the SiCNTs. It is also found that structural stability increases for longer and larger nanotubes. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Capacitance Spectroscopy Study of Midgap Levels in n-Type SiC Polytypes

Abstract: As-grown and 116 keV electron-irradiated n-type 3C and 4H-SiC epilayers were electrically characterized by means of Fourier-transform deep level transient spectroscopy (FT-DLTS). A total of four deep levels, in the 0.20-0.73 eV range, below the conduction band, have been detected. By considering the band gap offset between 4H and 3C polytypes, we found that the deepest level in 3C-SiC labeled K3 (Ec-0.73 eV) has an energy position close to the EH6/7 level in 4H-SiC. An electron-dose dependence study of K3 and EH6/7, reveals that these two centers display a similar dose dependence behavior, suggesting that they may be related to the same defect.

Observation of novel defect structure in 2H‐AlN grown on 6H‐SiC(0001) substrates with 3‐bilayer‐height step‐and‐terrace structures

Abstract: 250 nm thick AlN layers without a nucleation layer were grown directly on 6H-SiC(0001) with 3-bilayer-height steps by rf-plasma-assisted molecular-beam epitaxy The structure and morphology of the AlN layers have been studied using atomic force microscopy, X-ray diffraction and transmission electron microscopy Two different types of unique defect structures were observed Rows of pure-edge-type threading dislocations were observed along the pre-existing step-edges of the SiC substrate for AlN grown on as-gas-etched SiC sub- strates, while the planar defects threading through the AlN layer were observed at the step-edges of the substrate for AlN on SiC with sacrificial oxidation We concluded that these planar defects were the stacking mismatch boundaries due to the difference in stacking sequence of AlN layers on different SiC terraces

In situ Gravimetric Monitoring of Thermal Decomposition and Hydrogen Etching Rates of 6H-SiC(0001) Si Face

Abstract: The thermal decomposition and hydrogen etching of a 6H-SiC(0001) Si-face were directly monitored using an in situ gravimetric monitoring system. The monitoring of the weight change of the 6H-SiC Si-face using this system clarified the dependences of the thermal decomposition and hydrogen etching rates on the substrate temperature. Although the thermal decomposition of the 6H-SiC Si-face above 1400 °C generated a graphite layer since only the Si atom directly desorbs from the surface, the etching of the 6H-SiC Si-face by hydrogen did not form this layer, and both Si and C atoms react with hydrogen. Moreover, the surface reaction of the 6H-SiC Si face with H2 and the resultant surface morphology were found to change at approximately 1250 °C.

High electron mobility achieved in n‐channel 4H‐SiC MOSFETs oxidized in the presence of nitrogen

Abstract: Two types of nitrided n-4H-SiC MOSFETs have been investigated; the p-type 4H-SiC epilayer is either oxidized in the presence of N2O or an N-/Al-co-implanted, surface-near layer is over-oxidized. The electrical parameters of these MOSFETs are determined and compared. We have investigated the temperature-dependence of the threshold voltage VT and determined the effective mobility μeff and the field effect mobility μFE. Based on Hall effect measurements, we determined independently the free electron areal density ns, the Hall mobility μH and the differential Hall mobility μH,diff. The density of interface states Dit is obtained from the Hall effect, the temperature-dependent VT and the conductance method. The stability of both types of MOSFETs is tested under stress (VG = ±25 V) at T = 295 K and T = 375 K. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Improved Current Gain in GaN/SiC Heterojunction Bipolar Transistors by Insertion of Ultra-Thin AlN Layer at Emitter-Junction

Abstract: GaN/SiC Heterojunction Bipolar Transistors (HBTs) with ultra-thin AlN insertion layers at the n-GaN/p-SiC emitter junction are proposed to improve carrier injection efficiency. The current-voltage characteristics of n-GaN/AlN/p-SiC heterojunctions have exhibited very small reverse leakage and good rectification. The capacitance-voltage measurement have revealed that the conduction band offset between n-GaN and p-SiC has been reduced from -0.74 eV to -0.54 eV by insertion of AlN, indicating that the GaN/AlN/SiC heterojunction may show better electron-injection efficiency. A significantly improved common-base current gain (α~0.2) is obtained for GaN/AlN/SiC HBTs with initial N* pre-irradiation, while it was very low (α~0.001) for GaN/SiC HBTs without AlN layers.

Thermal stability of deep levels between room temperature and 1500 °C in as-grown 3C-SiC

Abstract: We report on the thermal stability of deep levels detected in as-grown bulk 3C-SiC. The investigation was performed by Fourier-transform deep level transient spectroscopy and an isochronal annealing series was carried out in the 100–1500 °C temperature range. We found three traps located between 0.14–0.50 eV below the conduction band edge minimum (EC). The shallower trap anneals out at temperatures below 1200 °C while the others display a high thermal stability up to at least 1500 °C. The nature of the former trap is discussed in detail on the basis of its annealing behavior and previous theoretical data found in the literature.

A New Class of Step-and-Terrace Structure Observed on 4H-SiC(0001) after High-Temperature Gas Etching

Abstract: Various interesting phenomena related to the step-and-terrace structures of crystal surfaces have been previously observed. In this paper, we report a unique phenomenon not observed previously: the formation of a new class of step-and-terrace structure on the 4H-SiC(0001) surface after high-temperature gas etching. The structure consists of a periodic array of pairs of 1-bilayer-height "down" steps and 5-bilayer-height "up" steps, in contrast to conventional step-and-terrace structures which consist of only "up" (or only "down") steps. We show that the newly observed (5–1)-bilayer-height step-and-terrace structure originates from spiral etching at a screw dislocation. A mechanism for step-flow etching which conserves the "up"-and-"down" step pairs is also proposed.

Anomalously Large Difference in Ga Incorporation for AlGaN Grown on the (1120) and (1100) Planes under Group-III-Rich Conditions

Abstract: The Ga incorporation behavior of AlGaN layers grown on nonpolar planes has been investigated comparing the (1120) and (1100) planes. AlGaN growth was performed on 4H-SiC(1120) and (1100) substrates by molecular-beam epitaxy under group-III-rich conditions. The Ga composition of the AlGaN layers was evaluated by energy-dispersive X-ray spectroscopy analysis as well as X-ray diffraction and cathodoluminescence measurements. The GaN mole fraction x of Al1-xGaxN layers grown on the (1100) plane is 0.12 for the Ga flux ratio [JGa/(JAl+JGa)] of 0.32 at 750 °C, while it is negligibly small (x<0.01) for growth on the (1120) plane.

Single versus double ion implantation a deep level study

Abstract: We performed a comparison study of electrically active defects generated in single and double ion implantated 4H-SiC epilayers. Capacitance–voltage (C –V) and deep level transient spectroscopy (DLTS) measurements revealed that dou- ble implantation, is responsible for a different compensation mechanism of the net-acceptor concentration, and for the different nature and annealing behavior of the detected deep levels. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Spatial Profiling of Planar Defects in 4H-SiC Epilayers Using Micro-Photoluminescence Mapping

Abstract: The micro-photoluminescence (micro-PL) spectroscopy and its intensity mapping have been utilized to investigate the planar defects, stacking faults (SFs), in 4H-SiC epilayers. Strong PL emissions from the SFs are observed even at room temperature. It is found that each kind of SF shows the distinct PL emission behaviours. Three kinds of SFs: intrinsic Frank SFs, double Shockley SFs, and in-grown SFs, have been identified in the samples based on the micro-PL spectra. At the same time, the micro-PL intensity mapping at the emission band of each SF has been performed to spatially profile the SFs. The shapes, distributions, and densities of SFs in the epilayers are then presented. The PL emission behaviours of each SF at low temperature are also studied.

Electrostatic-Actuated Suspended Ribbon Structure Fabricated in Single-Crystalline SiC by Selective Photoelectrochemical Etching

Abstract: An electrostatic-actuated suspended ribbon structure composed of single-crystalline SiC is presented. All the main parts of the structure, namely, a suspended ribbon, posts, base plate, and electrical connections, are made of homoepitaxially grown single-crystalline 4H-SiC with selective ion implantations. Electrical isolation between the ribbon and the base plate is established with a pnp junction. The structure is fabricated by a combination of reactive ion etching (RIE) and doping-selective photoelectrochemical (PEC) etching. The suspended ribbon is actuated by applying a voltage between the ribbon and the base plate.

Deep Levels Generated by Ion-Implantation in n- and p-Type 4H-SiC

Abstract: The authors have investigated deep levels in the whole energy range of bandgap of 4H-SiC, which are generated by N+, P+, Al+ implantation, by deep level transient spectroscopy (DLTS). Ne+-implanted samples have been also prepared to investigate the pure implantation damage. In the n-type as-grown material, Z1/2 (Ec – 0.63 eV) and EH6/7 (Ec – 1.6 eV) are dominant deep levels. When the implant dose is low, seven peaks (IN1, IN3 ~ IN6, IN8, IN9) have emerged by implantation and annealing at 1000oC in the DLTS spectra from all n-type samples. After high-temperature annealing at 1700oC, however, most DLTS peaks disappeared, and two peaks, Z1/2 and EH6/7 survive. In the p-type as-grown material, D center (Ev + 0.40 eV) and HK4 (Ev + 1.4 eV) are dominant. When the implant dose is low, two peaks (IP1, IP3) have emerged by implantation and annealing at 1000oC, and four traps IP2, IP4 (Ev + 0.72 eV), IP7 (Ev + 1.3 eV), and IP8 (Ev + 1.4 eV) are dominant after annealing at 1700oC.

High Channel Mobility of 4H-SiC MOSFETs Fabricated by Over-Oxidation of the N-/Al-Coimplanted Surface Layer

Abstract: Conventional MOSFETs and Hall-bar MOSFETs are fabricated side by side by over-oxidation of N-implanted or N-/Al-coimplanted 4H-SiC layers. It is demonstrated that the N-/Al-coimplanted MOSFETs possess a positive threshold voltage at room temperature and reach high values of the channel mobility. The effective electron mobility and Hall mobility in Hall-bar MOSFETs are 31 cm2/Vs and 150 cm2/Vs, respectively, indicating a high density of interface traps in spite of the excellent high mobility values.

1.5 kV Lateral Double RESURF MOSFETs on 4H-SiC (000-1)C Face

Abstract: SiC lateral double RESURF MOSFETs have been fabricated on the 4H-SiC (000-1)C face. By utilizing the C face, the channel resistance can be reduced because the C-face MOSFETs show higher channel mobility than the Si-face MOSFETs. In addition, by employing the double RESURF structure, the drift resistance is decreased and the breakdown voltage is increased with increasing the RESURF doses. The fabricated RESURF MOSFETs on the 4H-SiC (000-1)C face have demonstrated a low on-resistance of 40 mΩcm2 at an oxide field of 3 MV/cm and a breakdown voltage of 1580 V at zero gate bias. The figure-of-merit of the MOSFET is 62 MW/cm2, which is more than 10 times better than the conventional “Si limit” and the highest value among any lateral MOSFETs to date.

Determination of the thermo‐optic coefficients of GaN and AlN up to 515 °C

Abstract: The refractive index dispersions of hexagonal GaN and AlN have been investigated to determine the thermo-optic coefficients. Measurements were conducted at temperatures ranging from room temperature up to 515 °C in the wavelength range from the near band-edge to 1000 nm. Optical interference measurements with vertical incident configuration were employed to precisely evaluate the ordinary refractive indices. Optical simulation of AlGaN/GaN distributed Bragg reflectors was also carried out by using the obtained thermo-optic coefficients. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Improved On-Current of 4H-SiC MOSFETs with a Three-Dimensional Gate Structure

Abstract: 4H-SiC (0001) MOSFETs with a three-dimensional gate structure, which has a top channel on the (0001) face and side-wall channels on the {11-20} face have been fabricated. The three-dimensional gate structures with a 1-5 m width and 0.8 m height have been formed by reactive ion etching, and the gate oxide has been deposited by plasma-enhanced chemical vapor deposition and then annealed in N2O ambient at 1300°C. The fabricated MOSFETs have exhibited superior characteristics: ION / IOFF, the subthreshold swing and VTH are 1010, 250 mV/decade and 3.5 V, respectively. The drain current normalized by the gate width is increasing with decreasing the gate width. The normalized drain current of a 1 m-wide MOSFET is ten times higher than that of a conventional planar MOSFET.