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Wayne Luk
Researcher at Imperial College London
Publications - 737
Citations - 13643
Wayne Luk is an academic researcher from Imperial College London. The author has contributed to research in topics: Field-programmable gate array & Reconfigurable computing. The author has an hindex of 54, co-authored 703 publications receiving 12517 citations. Previous affiliations of Wayne Luk include Fudan University & University of London.
Papers
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Book ChapterDOI
Memory Access Optimization and RAM Inference for Pipeline Vectorization
Markus Weinhardt,Wayne Luk +1 more
TL;DR: Memory access optimization in the context of pipeline vectorization, a method for synthesizing hardware pipe- lines in reconfigurable systems from software program loops, is described, and a technique which allocates program arrays to memory banks is presented, thereby minimizing the overall access time.
Book ChapterDOI
Run-Time Management of Dynamically Recongigurable Designs
TL;DR: A method for managing reconfigurable designs, which supports run-time configuration transformation, is proposed, which involves structuring the reconfiguration manager into three components: a monitor, a loader, and a configuration store.
Journal ArticleDOI
Optimum and heuristic synthesis of multiple word-length architectures
TL;DR: This paper explores the problem of architectural synthesis (scheduling, allocation, and binding) for multiple word-length systems and demonstrates significant resource savings of up to 46% are possible by considering these problems within the proposed unified framework.
Journal ArticleDOI
Run-Time Integration of Reconfigurable Video Processing Systems
TL;DR: This paper proposes techniques for modeling the intermodule communication behavior based on statistical time-division multiplexing that enable system designers to guarantee that logical communication requirements between the adjunct modules can be satisfied by the infrastructure.
Journal ArticleDOI
A Real-Time Tree Crown Detection Approach for Large-Scale Remote Sensing Images on FPGAs
TL;DR: This paper proposes the first FPGA-based real-time tree crown detection approach for large-scale satellite images through reconstructing and modifying the workflow of the original algorithm into three computational kernels on FPGAs and obtains the speedup of 18.75 times for a satellite image with a size of 12,188 × 12,576 pixels.