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Wayne Luk
Researcher at Imperial College London
Publications - 737
Citations - 13643
Wayne Luk is an academic researcher from Imperial College London. The author has contributed to research in topics: Field-programmable gate array & Reconfigurable computing. The author has an hindex of 54, co-authored 703 publications receiving 12517 citations. Previous affiliations of Wayne Luk include Fudan University & University of London.
Papers
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Journal ArticleDOI
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
Dionisios Pnevmatikatos,Kyprianos Papadimitriou,Tobias Becker,Peter Böhm,Andreas Brokalakis,Karel Bruneel,Catalin Bogdan Ciobanu,Tom Davidson,Georgi Gaydadjiev,Karel Heyse,Wayne Luk,Xinyu Niu,Ioannis Papaefstathiou,Danilo Pau,Oliver Pell,Christian Pilato,Marco D. Santambrogio,Donatella Sciuto,Dirk Stroobandt,Tim Todman,Elias Vansteenkiste +20 more
TL;DR: The FASTER project will facilitate the use of reconfigurable technology by providing a complete methodology that enables designers to easily specify, analyse, implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigured technology.
Proceedings ArticleDOI
Source-directed transformations for hardware compilation
Jose G. F. Coutinho,Wayne Luk +1 more
TL;DR: This paper presents the Haydn-C language and its parallel programming model, a framework of optional annotations to enable users to describe design constraints, and to direct source-level transformations such as scheduling and resource allocation.
Journal Article
Parameterized function evaluation for FPGAs
TL;DR: In this article, the trade-offs involved between full-lookup tables, bipartite (lookup-add) units, lookup-multiply units, and shift-and-add based CORDIC units are discussed.
Proceedings ArticleDOI
A partially reconfigurable architecture supporting hardware threads
TL;DR: A partially reconfigurable architecture supporting hardware threads gives a unified software/hardware thread interface and high throughput point-to-point streaming structure and shows 1.61-4.59 times higher power efficiency than their implementations on state-of-the-art graphics processing units.
Proceedings ArticleDOI
Roundoff-noise shaping in filter design
TL;DR: An automated feasibility test is introduced, in order to decide whether a given filter realisation meets user-specified constraints on the roundoff noise power spectrum, which is used by an algorithm for optimization of individual signal widths within a filter structure.