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Wayne Luk

Researcher at Imperial College London

Publications -  737
Citations -  13643

Wayne Luk is an academic researcher from Imperial College London. The author has contributed to research in topics: Field-programmable gate array & Reconfigurable computing. The author has an hindex of 54, co-authored 703 publications receiving 12517 citations. Previous affiliations of Wayne Luk include Fudan University & University of London.

Papers
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Proceedings ArticleDOI

Framework for Development and Distribution of Hardware Acceleration

TL;DR: IGOL as mentioned in this paper is a framework for developing reconfigurable data processing applications, which adopts a four-layer architecture: application layer, operation layer, appliance layer and configuration layer.
Book ChapterDOI

A Flexible Multi-port Caching Scheme for Reconfigurable Platforms

TL;DR: In this paper, the authors exploit data re-use for both static and non-static parallel memory access patterns through the use of a multi-port cache, where parameters can be determined at compile time and matched to the statistical properties of the application, and where sub-cache contentions are arbitrated with a semaphorebased system.
Journal ArticleDOI

The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units

TL;DR: An empirical study that covers the location, pin arrangement, and interconnect between embedded floating point units (FPUs) and the fine-grained logic fabric in FPGAs shows that FPUs should be square, FPU's should be positioned tightly near the center of the FPGA and that the FPU pins should be arranged on four sides of theFPU.
Journal ArticleDOI

Programming framework for clusters with heterogeneous accelerators

TL;DR: A programming framework for high performance clusters with various hardware accelerators that has been used to support physics simulation and financial application development and achieves significant performance improvement on a 16-node cluster with FPGA and GPU accelerators.
Proceedings ArticleDOI

Pipelining designs with loop-carried dependencies

TL;DR: This work explores the reconfigurable dataflow approach in producing efficient hardware pipelines for programs with loop-carry dependencies in nested loops, and employs tagged tokens to enable reassembling of results which can retire out of order.