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Wayne Luk
Researcher at Imperial College London
Publications - 737
Citations - 13643
Wayne Luk is an academic researcher from Imperial College London. The author has contributed to research in topics: Field-programmable gate array & Reconfigurable computing. The author has an hindex of 54, co-authored 703 publications receiving 12517 citations. Previous affiliations of Wayne Luk include Fudan University & University of London.
Papers
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Proceedings ArticleDOI
Objective-driven workload allocation in heterogeneous computing systems
Qiang Liu,Wayne Luk +1 more
TL;DR: Results show that the heterogeneous computing system with appropriate workload allocation provides high energy efficiency with peak value at 1.1 GFLOPs/W and reduces power consumption by 56.54%; and that workload allocation schemes are significantly different with regards to different system metrics.
Book ChapterDOI
Hardware-Aware Optimizations for Deep Learning Inference on Edge Devices
TL;DR: In this article , a hardware-aware optimization strategy for deploying DL neural networks to FPGAs is presented, which automatically identifies hardware configurations that maximize resource utilization for a given level of computation throughput.
Posted Content
Seeing Shapes in Clouds: On the Performance-Cost trade-off for Heterogeneous Infrastructure-as-a-Service
TL;DR: In this article, a Pareto optimal trade-off for clusters of heterogeneous resources can be found by solving multiple, multi-objective optimisation problems, resulting in an optimal allocation of tasks to the available platforms.
Proceedings ArticleDOI
A comparison of FPGAs, GPUS and CPUS for Smith-Waterman algorithm (abstract only)
TL;DR: A comprehensive study of a systolic design for Smith-Waterman algorithm is presented, with specific focus on enhancing parallelism and on optimizing the total size of memory and circuits; in particular, efficient realizations for compressing score matrices and for reducing affine gap cost functions are developed.
Proceedings ArticleDOI
Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions
TL;DR: Simodense as discussed by the authors is a high-performance open-source RISC-V (RV32IM) softcore, optimized for exploring custom SIMD instructions, and its memory system is optimized for streaming bandwidth, such as very wide blocks for the last level cache.