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Journal ArticleDOI

A simple model for short-channel effects of a buried-channel MOSFET on the buried insulator

Yasuhisa Omura
- 01 Nov 1982 - 
- Vol. 29, Iss: 11, pp 1749-1755
TLDR
In this paper, a majority-carrier distribution model and a channel potential-profile model for a buried-channel MOSFET (BC-MOS-FET/SOI) were proposed, and simple expressions for threshold voltage and drain breakdown voltage were derived from the models.
Abstract
A majority-carrier distribution model and a channel potential-profile model, in which the barrier-lowering effect is taken into account, are proposed for a buried-channel MOSFET (BC-MOSFET/ SOI). Simple expressions for threshold voltage and drain breakdown voltage were derived from the models for a short-channel BC-MOSFET/ SOI. The comparison between theory and experimental results shows reasonable agreement. The drain-bias coefficient γ of threshold voltage for BC-MOSFET's/ SOI is approximately proportional to TN D -1L eff -2, where T, N D , and L eff are the temperature, the doping concentration in the channel region, and the channel length, respectively. The coefficient γ depends slightly on the drain bias. BC-MOSFET's/SOI are able to be more miniaturized than surface-channel MOSFET's (SC-MOSFET's) at the small power source voltage, and SC-MOSFET's are able to be more miniaturized than BC-MOSFET's/SOI at the large drain bias. It is shown that the conventional, simple scaling scheme, which holds the constant electric field, is not applicable to BC-MOSFET's/SOI. The power source voltage has to be fixed when dimensions and doping concentrations are scaled down. On the other hand, only the channel region thickness has to be fixed when the power source voltage is scaled down.

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Citations
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Journal ArticleDOI

0.1- mu m-gate, ultrathin-film CMOS devices using SIMOX substrate with 80-nm-thick buried oxide layer

TL;DR: In this paper, a 0.1- mu m-gate CMOS/SIMOX (separation by implanted oxygen) has been successfully fabricated using high quality SIMOX substrates and an advanced design concept for the subquarter-micron region based on a simple device model.
Journal ArticleDOI

Model for CMOS/SOI single-event vulnerability

TL;DR: In this paper, a lumped-parameter model derived from transistor characterization data has been used in SPICE analyses to study and predict the single-event upset thresholds for SIMOX SOI (separation by implantation of oxygen, silicon-on-insulator) SRAMs with a variety of cell designs.
Journal ArticleDOI

Quantum mechanical influences on short-channel effects in ultra-thin MOSFET/SIMOX devices

TL;DR: In this paper, an explicit manifestation of quantum-mechanical influences on the short channel effects (SCE) in the threshold voltage of ultra-thin buried-channel MOSFET/SIMOX devices is described.
Proceedings ArticleDOI

An Overview Of SOI By Implantation Of Oxygen: Materials, Devices And Circuits

TL;DR: In this article, the advantages of SOI versus Silicon on Sapphire (SOS) and bulk Si are discussed and the effects of ion implantation and anneal conditions are reviewed.
Journal ArticleDOI

Channel ion implantation for small-geometry high-performance CMOS-SOS circuits

TL;DR: In this article, an experimental study of channel ion implantation for optimization of small-geometry (1-1.5 µm) n-and p-channel silicon-on-sapphire (SOS) MOSFET's for high-performance CMOS applications is presented.
References
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Journal ArticleDOI

Design of ion-implanted MOSFET's with very small physical dimensions

TL;DR: This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/.
Journal ArticleDOI

Subthreshold conduction in MOSFET's

TL;DR: With the application of substrate bias, it is concluded from the data and the theory that two-dimensional effects can cause dramatic increases in the drain conductance to confirm the theory over a wide range of drain and gate voltages.
Journal ArticleDOI

Analytical models of threshold voltage and breakdown voltage of short-channel MOSFET's derived from two-dimensional analysis

TL;DR: In this paper, the authors derived analytical models of threshold voltage and breakdown voltage of short-channel MOSFETs from the combination of analytical consideration and two-dimensional numerical analysis.
Journal ArticleDOI

An analysis of the threshold voltage for short-channel IGFET's

TL;DR: In this article, the authors derived a closed-form threshold voltage equation for short-channel insulated-gate field-effect transistors (IGFETs) operating with source-to-substrate reverse bias.
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