Journal ArticleDOI
CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices
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In this article, the authors describe a digital logic architecture for CMOL hybrid circuits which combine a semiconductor-transistor (CMOS) stack and two levels of parallel nanowires, with molecular-scale nanodevices formed between the Nanowires at every crosspoint.Abstract:
This paper describes a digital logic architecture for ‘CMOL’ hybrid circuits which combine a semiconductor–transistor (CMOS) stack and two levels of parallel nanowires, with molecular-scale nanodevices formed between the nanowires at every crosspoint. This cell-based, field-programmable gate array (FPGA)-like architecture is based on a uniform, reconfigurable CMOL fabric, with four-transistor CMOS cells and two-terminal nanodevices (‘latching switches’). The switches play two roles: they provide diode-like I –V curves for logic circuit operation, and allow circuit mapping on CMOL fabric and its reconfiguration around defective nanodevices. Monte Carlo simulations of two simple circuits (a 32-bit integer adder and a 64-bit full crossbar switch) have shown that the reconfiguration allows one to increase the circuit yield above 99% at the fraction of bad nanodevices above 20%. Estimates have shown that at the same time the circuits may have extremely high density (approximately 500 times higher than that of the usual CMOS FPGAs with the same design rules), while operating at higher speed at acceptable power consumption. (Some figures in this article are in colour only in the electronic version)read more
Citations
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Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges
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Memristive devices for computing
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PatentDOI
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
TL;DR: In this article, the authors present stretchable and printable semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed, or otherwise deformed.
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Nanoelectronics from the bottom up
Wei Lu,Charles M. Lieber +1 more
TL;DR: This review presents a brief summary of bottom-up and hybrid bottom- up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers.
Journal ArticleDOI
Observation of conducting filament growth in nanoscale resistive memories
TL;DR: It is found that the filament growth can be dominated by cation transport in the dielectric film, and two different growth modes were observed for the first time in materials with different microstructures.
References
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Book
Introduction to solid state physics
TL;DR: In this paper, the Hartree-Fock Approximation of many-body techniques and the Electron Gas Polarons and Electron-phonon Interaction are discussed.
Journal Article
SIS : A System for Sequential Circuit Synthesis
TL;DR: This paper provides an overview of SIS and contains descriptions of the input specification, STG (state transition graph) manipulation, new logic optimization and verification algorithms, ASTG (asynchronous signal transition graph] manipulation, and synthesis for PGA’s (programmable gate arrays).