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Journal ArticleDOI

Exploring Optimized Hadamard Methods to Design Energy-Efficient SATD Architectures

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TLDR
This paper proposes the use of Hadamardbased Sum of Absolute Transformed Differences (SATD), in replacement of the traditionally used Sum of absolute differences (SAD), as a means of improving the efficiency of video coding.
Abstract
State-of-the-art video coding tools are submitted to severe performance and energy consumption requirements resulting from high complexity of video standards and from limited energy budgets of portable mobile devices. While providing most of the compression gains, inter frame and intra frame prediction techniques are the most demanding steps, since they compare a huge number of blocks. In such a process, the similarity metric employed affects both the quality of compression and the calculation effort. In this paper we propose the use of Hadamardbased Sum of Absolute Transformed Differences (SATD), in replacement of the traditionally used Sum of Absolute Differences (SAD), as a means of improving the efficiency of video coding. To allow that we explore two Hadamard Transform methods to design efficient SATD architectures, one using the Fast Hadamard Transform (FHT) but terfly and another one using the so-called Transform-Exempted (TE) SATD algorithm. Those methods were com bined with architectural decisions (full parallelism, full parallelism with pipelining or multi-cycling) to build a total of six Hadamard-based SATD architectures that were synthesized for a commercial 45nm standard cell library for two operating frequencies. The architectures were simulated with pixel block data to obtain realistic dynamic power and energy estimates. The TE-SATD architectures achieved the lowest energy results: down to 13.13 pJ/ SATD in the case of parallel architecture with pipeline. However, considering also the area results when evaluating energy, the best results are given by both methods using multi-cycling (transpose buffer): nearly 20.75 pJ/ SATD with up to 63.54% smaller area compared with fully parallel architectures.

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Citations
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Journal ArticleDOI

Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse

TL;DR: This paper shows that the SATD improves coding efficiency by up to −2.99% in BD-Rate when used in motion estimation within the HEVC Model (HM) and proposes a novel hardware architecture based on calculation reuse that can lead to area and energy savings.
Proceedings ArticleDOI

Coarse grain partial distortion elimination for Hadamard ME in HEVC

TL;DR: To save time and energy, the use of Partial Distortion Elimination (PDE) during block compositions is proposed, which reduces in average 9.96% and 19.3% the number of 8×8 and 4×4 SATDs, respectively.
Proceedings ArticleDOI

On the calculation reuse in hadamard-based SATD

TL;DR: It is proved that previously computed Hadamard Transform (HT) can be re-used in the computation of larger blocks and proposed generic SATD hardware design which implements such reuse is proposed.
Journal ArticleDOI

The 4-2 Fused Adder–Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures

TL;DR: This work extends the results about a new fused adder–subtractor (FAS) 4-2 compressor arithmetic operator to fuse both adds and subtractions in a single compact structure showing how to share the internal logic to perform simultaneously both operations.
Dissertation

Register-transfer level design of sum of absolute transformed difference for high efficiency video coding

Whit Ney Heh
TL;DR: A Verilog-described N × N SATD hardware architecture which is based on Hadamard Transform, designed to achieve throughput optimization by pipelining and feedthrough control and evaluated in terms of utilization, timing and power.
References
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TL;DR: An overview of the technical features of H.264/AVC is provided, profiles and applications for the standard are described, and the history of the standardization process is outlined.
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TL;DR: The main goal of the HEVC standardization effort is to enable significantly improved compression performance relative to existing standards-in the range of 50% bit-rate reduction for equal perceptual video quality.
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The H.264 Advanced Video Compression Standard

TL;DR: This book unravels the mysteries behind the latest H.264 standard and delves deeper into each of the operations in the codec, providing readers with practical advice on how to get the most out of the standard.
Journal ArticleDOI

Hadamard transform image coding

TL;DR: A high-speed computational algorithm, similar to the fast Fourier transform algorithm, which performs the Hadamard transformation has been developed, which provides a potential toleration to channel errors and the possibility of reduced bandwidth transmission.
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