Proceedings ArticleDOI
Full chip thermal analysis of planar (2-D) and vertically integrated (3-D) high performance ICs
Sungjun Im,Kaustav Banerjee +1 more
- pp 727-730
TLDR
In this article, the authors presented a full chip thermal analysis of 2D high performance ICs based on technological, structural, and material data from ITRS '99 and showed that interconnect Joule heating in advanced technology nodes can strongly impact the magnitude of the maximum temperature within 2-D chips despite negligible change in the chip power density.Abstract:
This work presents a full chip thermal analysis of 2-D high performance ICs based on technological, structural, and material data from ITRS '99 It is shown that interconnect Joule heating in advanced technology nodes can strongly impact the magnitude of the maximum temperature within 2-D chips despite negligible change in the chip power density, as per the ITRS This result has been shown to have significant implications for interconnect reliability and performance not foreseeable by the ITRS Furthermore, detailed thermal analysis of vertically integrated (3-D) ICs has been carried out using analytical modeling and numerical simulations Additionally, comparison between the thermal design of two alternative 3-D technologies has been presented for the first time using ITRS dataread more
Citations
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Journal ArticleDOI
3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration
TL;DR: This paper analyzes the limitations of the existing interconnect technologies and design methodologies and presents a novel three-dimensional chip design strategy that exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize a system-on-a-chip (SoC) design.
Proceedings ArticleDOI
3D-ICE: fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling
TL;DR: 3D-ICE, a compact transient thermal model (CTTM) for the thermal simulation of 3D ICs with multiple inter-tier microchannel liquid cooling, is presented, which offers significant speed-up over a typical commercial computational fluid dynamics simulation tool while preserving accuracy.
Book
Three-Dimensional Integrated Circuit Design
TL;DR: In this article, the first book on 3D integrated circuit design, covering all of the technological and design aspects of this emerging design paradigm, while proposing effective solutions to specific challenging problems concerning the design of three-dimensional integrated circuits.
Journal ArticleDOI
Compact AC Modeling and Performance Analysis of Through-Silicon Vias in 3-D ICs
TL;DR: In this article, the authors presented the first comprehensive and accurate compact RLCG model for through-silicon vias (TSVs) in 3D ICs valid from low- to high-frequency regimes, with consideration of the MOS effect in silicon, the alternating-current (ac) conduction in silicon and the skin effect in TSV metal, and the eddy currents in the silicon substrate.
Journal ArticleDOI
Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures
TL;DR: 3D circuit cooling by means of an integrated microchannel network is theoretically studies and predictions are based on thermal models solving one-dimensional conservation equations for boiling convection along microchannels, and are consistent with past data obtained from straight channels.
References
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Journal ArticleDOI
3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration
TL;DR: This paper analyzes the limitations of the existing interconnect technologies and design methodologies and presents a novel three-dimensional chip design strategy that exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize a system-on-a-chip (SoC) design.
Proceedings ArticleDOI
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Proceedings ArticleDOI
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