Journal ArticleDOI
High-Speed Arithmetic in Binary Computers
O. L. Macsorley
- Vol. 49, Iss: 1, pp 67-91
TLDR
Methods of obtaining high speed in addition, multiplication, and division in parallel binary computers are described and then compared with each other as to efficiency of operation and cost.Abstract:
Methods of obtaining high speed in addition, multiplication, and division in parallel binary computers are described and then compared with each other as to efficiency of operation and cost. The transit time of a logical unit is used as a time base in comparing the operating speeds of different methods, and the number of individual logical units required is used in the comparison of costs. The methods described are logical and mathematical, and may be used with various types of circuits. The viewpoint is primarily that of the systems designer, and examples are included wherever doing so clarifies the application of any of these methods to a computer. Specific circuit types are assumed in the examples.read more
Citations
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Journal ArticleDOI
Memory systems
TL;DR: Cache memories are a general solution to improving the performance of a memory system by placing smaller faster memories in front of larger, slower, and cheaper memories to approach that of a perfect memory system—at a reasonable cost.
Journal ArticleDOI
Carry-Select Adder
TL;DR: The adder system described increases the speed of the addition process by reducing the carry-propagation time to the minimum commensurate with economical circuit design.
Journal ArticleDOI
A method for speed optimized partial product reduction and generation of fast parallel multipliers using an algorithmic approach
TL;DR: The proposed method is applicable to any multiplier size and adaptable to any technology for which speed parameters are known, and it is easy to incorporate this method in silicon compilation or logic synthesis tools.
Proceedings ArticleDOI
SOBER: statistical model-based bug localization
TL;DR: The result demonstrated the power of the approach in bug localization: SOBER can help programmers locate 68 out of 130 bugs in the Siemens suite when programmers are expected to examine no more than 10% of the code, whereas the best previously reported is 52 out of130.
Journal ArticleDOI
Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination
TL;DR: The problem formulation for solving the multiple constant multiplication (MCM) problem is introduced where first the minimum number of shifts that are needed is computed, and then the number of additions is minimized using common subexpression elimination.
References
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Journal ArticleDOI
A New Class of Digital Division Methods
TL;DR: A class of division methods best suited for use in digital computers with facilities for floating point arithmetic by considering the nature of each quotient digit as generated during the division process is described.
Journal ArticleDOI
Fast Carry Logic for Digital Computers
TL;DR: A method is described to realize the implied 8 to 1 time saving by deriving an actual ``carry completion'' signal, and experimental results verify this saving.
Proceedings ArticleDOI
The engineering design of the stretch computer
TL;DR: This computer, like the 704, is aimed at scientific problems such as reactor design, hydrodynamics problems, partial differential equations etc., its instruction set and organization are such that it can handle with ease data-processing problems normally associated with commercial applications, such as processing of alphanumeric fields, sorting, and decimal arithmetic.
Proceedings ArticleDOI
An analysis of carry transmission in computer addition
S. G. Campbell,G. H. Rosser +1 more
TL;DR: The purpose of this paper is to determine the effect of various methods of increasing the speed of binary addition by "carry sensing", designed to increase the speed with which carries are propagated.