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Proceedings ArticleDOI

Investigation of DC Parameters of Double Gate Tunnel Field Effect Transistor (DG- TFET) for different Gate Dielectrics

TLDR
In this article, the authors focused on the DC parameters of double gate tunnel field effect transistors (DGTFETs) and derived the I d -V g characteristic of the device.
Abstract
In this research we focused to study the DC parameters of Double Gate Tunnel Field Effect Transistor (DGTFET). To overcome the major challenges faced by the conventional MOSFET, a silicon-based TFET device structure is constructed with SiO 2 as gate dielectric using TCAD simulator. The I d -V g characteristic of the device is plotted and various DC parameters are extracted. The DC parameters considered here are leakage current (I off ), driving current (I on ) and threshold voltage (V t ). The plot of electrostatic potential and electron barrier tunneling are also depicted. The same study is carried out for high κ-dielectrics like Silicon Nitride (Si 3 N 4 ) and Hafnium Dioxide (HfO 2 ). The performance of DC parameters for various gate dielectrics is compared and studied.

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References
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Journal ArticleDOI

Moore's law: past, present and future

TL;DR: Moore's Law has become the central driving force of one of the most dynamic of the world's industries as discussed by the authors, and it is viewed as a reliable method of calculating future trends as well, setting the pace of innovation, and defining the rules and the very nature of competition.
Journal ArticleDOI

Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric

TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI

Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

TL;DR: In this article, the double-gate tunneling field effect transistor (DG TFET) was explored through two dimensional device simulations and the on-state drain current of the DG TFET has a strong dependence on the silicon film thickness and the physics governing it is detailed.
Proceedings ArticleDOI

Double Gate Tunnel FET with ultrathin silicon body and high-k gate dielectric

K. Boucart, +1 more
TL;DR: In this paper, a double gate tunnel field effect transistor (DG TFET) was proposed, which showed significant improvements compared with single gate devices with a SiO 2 gate dielectric.
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