Patent
Low-power low-jitter variable delay timing circuit
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TLDR
In this paper, a timing circuit includes at least one delay element and its supply voltage is obtained from an active current source, which is driven by a differential amplifier, and an RC compensating circuit may be coupled to the current control node.Abstract:
The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay element supply line to a voltage on a current control node connected to a voltage controlled current source. An RC compensating circuit may be coupled to the current control node.read more
Citations
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Patent
Temperature compensation via power supply modification to produce a temperature-independent delay in an integrated circuit
TL;DR: In this article, a method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay-locked loop (DLL) or other delay element or subcircuit on an integrated circuit is disclosed.
Patent
Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication
Brian Holden,Amin Shokrollahi +1 more
TL;DR: In this paper, the authors describe a vector signaling code (VSC) for high speed and high pin efficiency with good resilience to common mode and other noise on the communication bus.
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Clock alignment circuit having a self regulating voltage supply
TL;DR: In this article, a clock alignment circuit is proposed for reducing power dissipation, increasing power supply noise immunity, decreasing process and temperature variation sensitivity, and providing a wide operating range.
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Methods and Systems for High Bandwidth Chip-to-Chip Communications Interface
John T. Fox,Brian Holden,Peter Hunt,John D. Keay,Amin Shokrollahi,Andrew Kevin John Stewart,Giuseppe Surace,Roger Ulrich,Richard Simpson +8 more
TL;DR: In this article, a vector signaling code is used for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization, where each wire carries a low swing signal that may take on more than two signal values.
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Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication
TL;DR: In this article, vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels.
References
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Book
Digital Systems Engineering
William J. Dally,John W. Poulton +1 more
TL;DR: The techniques described in this book, which were once used only in supercomputers, are now essential to the correct and efficient operation of any type of digital system.
Journal ArticleDOI
A portable digital DLL for high-speed CMOS interface circuits
Bruno W. Garlepp,Kevin S. Donnelly,Jun Kim,P.S. Chau,Jared L. Zerbe,C. Huang,Chanh Tran,Clemenz L. Portmann,D. Stark,Yiu-Fai Chan,Thomas H. Lee,Mark Horowitz +11 more
TL;DR: In this article, a digital delay-locked loop (DLL) that achieves infinite phase range and 40-ps worst case phase resolution at 400 MHz was developed in a 3.3-V, 0.4-/spl mu/m standard CMOS process.
Patent
Phase-locked loop delay line
TL;DR: In this article, a phase-locked loop driven by a reference frequency source such as a crystal oscillator and including a variable delay circuit is proposed to provide precise delays. But the phase error signal representative of phase error is developed and applied to vary the amount of delay until the phase errors are eliminated.
Journal ArticleDOI
A high-speed, low-power clock generator for a microprocessor application
TL;DR: A dedicated on-chip voltage regulator based on a bandgap reference has been designed to reduce the effect of supply noise on the clock generator, to avoid a large voltage drop across the power-supply bond wires during the startup sequence.
Journal ArticleDOI
Am improved tail current source for low voltage applications
TL;DR: In this article, a new current source for low-voltage applications is proposed, which is well suited for biasing differential pairs and source followers and measured compliance voltage is slightly smaller than that of a single transistor.