Proceedings ArticleDOI
On-chip spectrum analyzer for built-in testing analog ICs
M. Mendez-Rivera,Jose Silva-Martinez,Edgar Sanchez-Sinencio +2 more
- Vol. 5, pp 61-64
TLDR
An on-chip spectrum analyzer using switched-capacitor techniques is described, used for built-in testing analog circuits and its inherent synchronization facilitates the testing task saving time, power and silicon area.Abstract:
An on-chip spectrum analyzer using switched-capacitor techniques is described. This system is used for built-in testing analog circuits. The main property of the proposed architecture is its inherent synchronization, which facilitates the testing task saving time, power and silicon area. Simulations and breadboard results are presented in order to verify the main principles. The resolution of the on-chip spectrum analyzer is limited to 8 bits.read more
Citations
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Journal ArticleDOI
Low-cost test of embedded RF/analog/mixed-signal circuits in SOPs
TL;DR: In this article, the authors provide a discussion of the emerging BOT and BIT schemes for embedded high-speed RF/analog/mixed-signal circuits in SOPs.
Journal ArticleDOI
An On-Chip Spectrum Analyzer for Analog Built-In Testing
TL;DR: An analog built-in testing (BIT) architecture and its implementation enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface.
Proceedings ArticleDOI
Feature extraction based built-in alternate test of RF components using a noise reference
TL;DR: The proposed scheme makes use of low-speed low-resolution undersampling to eliminate the need for a bulky analog-to-digital converter and the use of a noise reference for comparison makes it possible to compensate for imperfect stimulus generation.
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System-Level Specification Testing Of Wireless Transceivers
TL;DR: The proposed test methodology addresses system-level testing problems by simplifying the test stimulus application and test response capture/analysis procedures, and the number of test hardware configurations needed to measure all the performance specifications is minimized.
Proceedings ArticleDOI
A digital method for phase noise measurement
TL;DR: To reduce the test costs of phase noise measurements, all-digital methods are used to detect sinusoidal phase noise components while reducing the need for computation intensive FFT.
References
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Book
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Proceedings ArticleDOI
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Proceedings ArticleDOI
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Benoit Dufort,Gordon W. Roberts +1 more
TL;DR: Two different silicon implementations of a new method for generating analog signals with very low complexity and hardware requirements are presented and their performance is analyzed through different experimental results.