Showing papers on "Automatic frequency control published in 1990"

Optical synchronization of millimeter-wave oscillators for distributed architecture

Abstract: A review of various methods of phase and frequency synchronization of active MMIC based transmit/receive modules is presented, and particular emphasis is placed on the synchronization of oscillators through the use of an indirect subharmonic optical injection locking technique. In this approach, the nonlinear behavior of large-signal modulated laser diodes and solid-state oscillators is exploited to extend the bandwidth of the synchronizing link to the millimeter-wave frequency range. Experimental results of the phase and frequency coherency of two 21.5 GHz FET oscillators are reported. Optimum performance is achieved at a subharmonic factor of 1/4, with a locking range of 84 MHz and a phase noise degradation of only 14 dB. The phase coherency measurement of two injection-locked oscillators points to a phase shift, which is introduced as a result of the frequency detuning between the slave and master oscillator signals. A scheme to correct for this phase error is presented. >

Load-adaptive frequency tracking control implementation of two-phase resonant inverter for ultrasonic motor

Abstract: The basic driving and control principles and the operating characteristics of a newly-developed ultrasonic motor (USM) are described. The two-phase resonant inverter for driving the USM, which includes a variable-frequency PWM (pulse width modulation) control scheme and a phasor control function between inverters, is discussed. A novel automatic resonant frequency tracking strategy using the PLL (phase-locked loop) technique is presented. It uses both sensor and sensorless interfaces to operate at a certain optimum point. The two-phase high-frequency inverter using parasitic resonant impedances incorporated in the ultrasonic motor, which is represented in terms of an electrical resonant tank circuit model, is proposed as a high-power density switching mode ultrasonic power amplifier. Experimental results obtained with this inverter-drive USM system with frequency timing control are illustrated. >

Multiple frequency bio-impedance measurement system

Abstract: The multiple frequency impedance measurement system of the present invention permits noninvasive examination of living tissue at any one of a plurality of frequencies. Precise frequency control is provided by a phase locked loop (PLL) circuit which is adjustable among at least a plurality of frequencies by locking the loop to the output signal generated by a voltage controlled oscillator (VCO) divided by a selectable divisor. By selecting the divisor of the output signal of the VCO, the frequency is changed and, due to the use of a PLL circuit, each selected frequency is stably maintained. Electrodes connecting the circuit to tissue to be monitored are driven by a high-Q filter and buffer amplifier which convert the square wave output from a voltage controlled clipper circuit to a sine wave signal. The clipper circuit receives the output signal from the VCO and is part of a feedback loop which maintains a constant examination current for the system. By monitoring the examination current via a precision resistor, a current reference signal is generated and used in the feedback loop to maintain the current at a substantially constant but selectable level. The reference signal is also used to drive a resistance synchronous detector and a reactance synchronous detector to derive resistance and reactance signals, respectively, which are representative of the resistance and reactance of the tissue at the selected measuring frequency. The resistance and reactance signals are displayed via a shared digital display which is switched between the two signals.

Phase-, frequency-locked loops, and amplitude control

Abstract: Phase-Locked Loop Fundamentals. Phase-Locked Loop Tracking Performance in the Presence of Noise. Unaided Acquisition. Aided Acquisition. Loop Threshold. Amplitude Control. Automatic Frequency Control. Brief Review of Some Mathematical Fundamentals. Relaxation Times, Meantime Between Cycle Slips, Transition Rates, and Eigenvalues of Fokker-Planck Operators. Renewal Process Approach. The Matrix Eigenvalue Approach. Epilogue: Unexplored Topics. Index.

A unified modulation algorithm for voltage and current source inverters based on AC-AC matrix converter theory

Abstract: A unified pulse width modulation (PWM) algorithm is presented that is derived from AC-AC matrix power converter theory. The algorithm can be used to implement either a voltage source or a current source inverter, using only conventional bridge topologies. The resultant modulation strategy produces minimal low-order AC harmonics, yet it is readily capable of being computed online in a single switching cycle by a low-cost microprocessor at switching frequencies of up to several kilohertz. The unified algorithm also has the desirable feature of independent control of the output waveform magnitude and frequency and provides for a wide range of operation without changing the switching frequency. Furthermore, the strategy guarantees DC source current continuity for the current source inverter topology while still allowing the AC output current to step change to a new value within one switching cycle. Theory, simulation results, and experimental results showing the unified algorithm in operation are presented. >

Stability analysis in induction motor driven by V/f controlled general-purpose inverter

Abstract: For an induction motor driven by a sinusoidal voltage source of adjustable amplitude and frequency, such as a pulse-width-modulation (PWM) inverter, the occurrence of sustained oscillations has often been observed when the drive is underloaded. In order to solve this problem, a linearized model is considered. The conditions under which the oscillations originate and how to determine the oscillating range in the stator voltage versus frequency are clarified. A physical explanation is also given for the analytical results. It is found that the motor becomes unstable when the rotor circuit time constant becomes larger than the mechanical time constant in rotor motion: however, the existence of transient inductance works so as to suppress the instability and stabilize the motor. There exist two asymptotes which restrict the oscillating range in the plane composed of the axis of the equivalent magnetizating current magnitude and that of stator frequency. >

A VLSI demodulator for digital RF network applications: theory and results

Abstract: An all-digital demodulator/detector which is suitable for both analog FM and digital phase/frequency modulations is presented. The system uses complex sampling, which employs a single A/D (analog/digital) converter to sample the signal at an intermediate frequency (IF) and produce baseband in-phase (I) and quadrature phase (Q) signals, and a simplified technique for reducing the effect of the I/Q timing misalignment usually associated with this approach. The system also includes two detectors which operate simultaneously to provide noncoherent and differentially coherent detection, as well as automatic gain control (AGC) and automatic frequency control (AFC). The flexibility afforded by the two concurrent detectors in this all-digital system is shown to make it suitable for a wide range of applications. The theory behind the demodulator/detector system is described, and an implementation using a 1.25- mu m bulk CMOS VLSI process is presented. Methods are shown for extending and improving the I/Q sampling misalignment correction technique, as well as for reducing the A/D sampling rate for a given IF frequency. Simulation and experimental results illustrate system performance for both analog and digital modulations. >

Constitution of V/f control for reducing the steady-state speed error to zero in induction motor drive system

Abstract: In order to extend the applicability of a voltage/frequency (V/f) controlled induction motor drive system, the problem of reducing to zero the steady-state speed error caused by load changes without using a rotor speed sensor is treated. The theoretical basis for this is given, and a scheme for constituting the control system is presented. The frequency of the stator voltage is controlled so as to compensate for the error, and this strategy is called the frequency compensation control (FCC). Transforming an induction motor into the corresponding idealized induction motor (IIM), which is defined as a motor having no stator resistance and leakage inductances, plays an essential role in realizing the FCC. The V/f control can exhibit excellent abilities when and only when it is applied to IIM, and is of the open-loop type in terms of the rotor speed. A well-known distinctive feature of Vf control, that it can generate a relatively large torque in the low-speed range to some extent, can be made use of with the maximum of ability. The proposed drive system is applicable to a part of the area in which the usual vector control equipped with a speed sensor has been utilized until now. In addition, as it has a detecting function for electromagnetic torque, torque monitoring is feasible. >

Phase-locked loop with pulse-duration modulation fine frequency control

Abstract: A phase-locked loop includes an oscillator controlled by means of a switching network and a microprocessor which generates, in response to the output of a phase detector, two groups of output signals. A first group (Q1 . . . QN) is for adjusting the frequency of the oscillator in steps by selectively switching in frequency determining elements, and a second group (P1 . . . PM) for feeding a pulse duration modulator. The pulse duration modulator produces a control signal for a frequency determining minimum element of the switching network. The control signal has a duty cycle indicative of the frequency determination contribution by the minimum element.

Variable frequency signal generator

Abstract: A variable frequency signal generator includes a phase locked loop having a variable frequency oscillator (1) which has a control port to which a frequency determining signal is applied, the output of the oscillator being fed via a frequency divider (6) to a phase sensitive detector (7) where it is compared with a reference frequency signal, the result of said comparison being arranged to generate a comparison signal which is fed to a loop filter (9) which is coupled to said control port; and the signal generator including means for applying a frequency control signal thereto comprising a first path being arranged to adjust the division ratio of the frequency divider (6), and a second path including means for combining said frequency control signal and said comparison signal to produce said frequency determining signal; and calibration means (11-14) for adjusting the relative characteristics of said first and second paths to compensate for effects arising from tuning sensitivity dependence on frequency of said variable frequency generator (1).

Analysis and application of switched‐capacitor transformers by formulation

Abstract: The operating characteristics of the switched capacitor transformer are formulated and analyzed by means of the state-space averaging method for the three types: 1/2-step-down type, 2-step-up type, and polarity inverting type. The following conclusions are obtained: (1) The static characteristic is equivalent to that of a battery with the induced voltage of the input times the transformer ratio and the output resistance represented by the duty ratio and the on-resistances of the switches. (2) Using switches having small on-resistances and selecting a high duty ratio and the frequency five to ten times the natural frequency of the circuit, the output resistance can be made small and a high transforming efficiency of 80 to 90 percent can be realized. (3) The dynamic characteristic is a first order for the step-down type and a second order for the step-up and polarization inverting type in which no oscillation results with a feedback. In comparison with a switching converter using a reactor, the present structure is superior in stability. These conclusions were confirmed experimentally. Next, as an application of the switched-capacitor transformer, a dc-dc converter with a 12-V input and a 5-V output was constructed. As a method for regulating the output, an on-resistance control was used instead of a conventional PWM control and a frequency control. The test results are excellent as: (1) the ripple of the output voltage is reduced to one-tenth that for the PWM control, (2) the maximum output power is 50 W (10 A) and the efficiency is 80 percent for the specified input and output, and (3) the load response is excellent.

Frequency control apparatus and method for a digital radio receiver

Abstract: A frequency control apparatus for a burst-mode radio communications system (TDMA) employing a frequency correction signal transmitted as a burst to enable correction of frequency differences between the frequency of the radio carrier of a subsequent communication burst and the frequency of reception by a radio receiver, the frequency control apparatus including a variable frequency oscillator (115), for receiving a frequency correction signal burst and a digital signal processor (111) for processing a communication burst having a frequency difference between said variable frequency oscillator and the radio carrier frequency of said communication burst and for generating a singular control signal value and for applying said singular control signal value to said variable frequency oscillator (115), via an A/D converter, to correct said frequency difference.

Paging receiver with automatic frequency control

Abstract: A receiver (200) includes an automatic frequency controller that determines the frequency of a receiver signal, and a calculates a frequency error from the received signal. The frequency error is used to calculate a correction factor (316) that is used to adjust the frequency of an oscillator (308) in response to the determined error.

Frequency control based on sensing voltage fed to an induction motor

Abstract: A frequency control method is incorporated in a motor drive to prevent overcurrent trips when an induction motor is subjected to impact loads or reconnection under load. The drive includes a current regulator loop to control stator current and a voltage regulator loop to control the command to the current regulator. Motor voltage is sensed and a voltage error is developed. This voltage error is processed through a proportional-integral control loop which controls an operating frequency signal to the current regulator. The drive responds during current limit conditions to reduce operating frequency and speed until the current limit conditions subside. The motor can then be re-accelerated up to the desired operating speed.

A 250-MHz monolithic voltage-controlled oscillator with low temperature coefficient

Abstract: A monolithic voltage-controlled oscillator (VCO) with dual-loop feedback, designed and fabricated in a 2- mu m oxide-isolated bipolar technology, is discussed. The VCO, consuming 220 mW from a single 5-V supply and occupying 2200 mil/sup 2/, achieves a -65 p.p.m./ degrees C temperature coefficient of frequency. It has a 5:1 frequency control range, and the maximum oscillation frequency is 250 MHz with better than a 2% voltage-to-frequency linearity. The modulation bandwidth of the VCO is greater than 12 MHz, and the power supply rejection ratio is 0.4%/V. >

An alternative method for controlling two-output DC-to-DC converters using saturable core inductor

Abstract: An alternative to the use of a conventional magnetic amplifier in the control of a second output in buck derived DC-to-DC converters is presented. Power semiconductors in the active region are avoided and the second output does not present additional phase shift due to the rest of the core system. These two advantages increase converter efficiency and transient response. The method is based on a double modulation of the switching frequency and duty cycle in the power switch. The switching frequency modulation is, however, relatively small. Keeping the switching frequency almost constant versus input voltage variations and changing slightly versus load variations. >

Frequency agile microwave signal generator

Abstract: A frequency synthesized, microwave signal generator (50) is disclosed that provides multiple channel frequency selection capability with rapid channel change time and low levels of spurious signals and noise. The generator (50) uses a microwave harmonic phase locked loop (82) to lock a microwave VCO (68) to a programmable harmonic of a VHF reference crystal oscillator (60) to provide coarse frequency control in steps equal to that reference frequency. The phase lock loop (82) includes an offset mixer (74) for injecting an offset signal frequency to achieve fine frequency control. A harmonic detection and counting scheme is used to rapidly sweep the harmonic loop (82) and to obtain phase lock at the desired harmonic (Figure 1).

Implementation of current source inverter for power line conditioning

Abstract: A current source inverter (CSI) designed to operate as a power line conditioner (PLC) is presented. Only six power switches are required for the CSI. A 5 kVA test model of the CSI has been built using insulated gate bipolar transistors (IGBTs) controlled by a digital signal processor (DSP). To determine system performance, experimental results are compared with computer simulations of an innovative adaptive frequency domain control for pulse width modulated (PWM) switching of the CSI. The adaptive frequency domain control algorithm performs quite well in both steady-state and transient conditions. The steady-state distortion factor of the line current is reduced from 28% to 5% or less. The displacement power factor is corrected from 0.5 lagging to unity. Single cycle PLC response time to a step change in load is demonstrated. >

Offset frequency stabilization of RF excited waveguide CO/sub 2/ laser arrays

Abstract: A close-packed array of waveguide lasers provides an offset frequency which is inherently more stable than that from independent devices, and permits difference frequency tuning based on the tilting of a common resonator mirror. Examples are given for two- and three-channel arrays. Passive stability of the beat frequencies between channels generated by this tuning method is shown to be good, and for two channel arrays was further enhanced by using an electronic stabilization loop. A simple model of the control loop is formulated to express the relationship between the loop parameters and resultant improvement in frequency stability. The model parameters are compared to experimental results through Allan variance measurements. An Allan variance minimum of 20 Hz has been achieved for the two-channel system and areas for further improvements are considered. >

Doppler frequency shift estimation for differentially coherent CPM

Abstract: A communication scheme based on continuous-phase modulated (CPM) signals used in conjunction with trellis-coded modulation (TCM) is considered. To keep the complexity manageable, a detection scheme based on differential detection of CPM signals is used. Methods that estimate the Doppler-induced frequency shift from the receiver signal are studied. Since differential detection transforms a frequency shift into a phase shift, the phase estimation problem is examined first. Three Doppler frequency estimation schemes that are based on open-loop structures and that are designed to achieve different ranges of Doppler frequencies that can be estimated are introduced. These estimators show different degrees of complexity and (at least for high signal-to-noise ratios) significantly different estimation errors. Their performance is compared by using a simulation approach. >

VCO frequency control circuit

Abstract: A means for setting the free-running frequency of a voltage controlled oscillator (VCO) (12) without requiring laser trimming or the like is described. The VCO forms part of an interconnected phase-locked loop (PLL) and frequency-locked loop (FLL). At system power on, the PLL is automatically disabled and a digital-to-analog (DAC) (11) in the PLL is set to a value corresponding substantially to the centre of a preselected lock range. The FLL, which includes a second DAC (10), then operates to generate a bias voltage for incrementing or decrementing the VCO output frequency until the VCO pulse count stored in a register equals an expected count; whereupon the VCO will be set at its free-running frequency. When the PLL is enabled, a phase error generator (14) generates a digital phase error signal from the input data. A digital integrator (19) converts the phase error signal to a digital frequency error signal. These error signals are added and the result is supplied to the DAC in the PLL for providing an analog output indicative of PLL frequency error. The outputs from both DACs are summed and the resultant current is converted to a bias voltage to adjust the VCO frequency as necessary for normally maintaining it within said lock range. If the VCO frequency deviates from said range, the frequency error signal to the PLL DAC is zeroed, and the frequency error signal is supplied to the FLL DAC. The phase error signal from the PLL DAC and the signal from the FLL DAC as modified by the frequency error signal are summed, and the resultant current in converted to a bias voltage to adjust the VCO frequency to within said lock range.

Cyclic quasi-resonant converters: a new group of resonant converters suitable for high performance DC/DC and AC/AC conversion applications

Abstract: The conventional resonant switch and quasi-resonant converters (QRCs) are generalized with regard to the viewpoint of a switch cell. A new resonant switch and a new family of resonant converters, the cyclic resonant switch (CRS) and cyclic quasi-resonant converters (CQRCs), are proposed as a part of the generalized topologies of QRCs. The CQRCs show very simple operation and easy control and analysis. They overcome the limited control range characteristics of the conventional QRCs and they can be applied for an AC chopper as well as a DC/DC converter. Steady-state operations and characteristics of the buck-type CQRC are analyzed and verified experimentally for a 200 kHz, 1 kW power level. >

An Allan variance real-time processing system for frequency stability measurements of semiconductor lasers

Abstract: A real-time frequency stability measurement system for semiconductor lasers was developed. Since the frequency of the input signal is measured successively without clearing the counter, measurements of the Allan variance made with this system are more accurate than those made with conventional instruments. The Allan variance can be measured for integration times tau from 1 mu s to 10000 s, and the number N of measured frequencies averaged over the integration time tau can be arbitrarily selected up to N=707 for each integration time. The highest measurable frequency was 90 MHz. It was demonstrated experimentally that this system can be used for measurements of the frequency stability of semiconductor lasers. >

Optical frequency monitor

Abstract: An optical frequency monitoring arrangement including high-pass and low-pass optical filter means (21, 22), means for feeding (20) an optical signal to both filter means and means for determining the ratio of the transmitted optical powers through the filters. The arrangement may be used in a feedback loop to provide frequency control of a laser light source in an optical communication system, Fig. 5 (not shown).

Method and device for restarting an induction motor

Abstract: The invention relates to a method and a device for restarting an induction motor (16) which rotates as a consequence of a moment of inertia. According to the invention, an acceleration value (a) is calculated by means of derived remanence frequency values (fRa,fRe), with which frequency adjustment values (f'St) are interpolated which control the output frequency (fw) of the frequency converter (2), and a flux is built up in the machine (16) during interpolation of the frequency control values (f'St) by increasing a voltage adjustment value (uSt) of the output voltage (uR,S,T) of the frequency converter (2) in a controlled manner. A drive (2, 16) can thus be captured without shock or torque, the catchment speed being dependent only on the rotor time constant.

Optical transmission network with frequency locking means

Abstract: Frequency stabilizing in a, for instance star/branched-tree shaped, network can be well executed by locking the frequencies (f1) of the transmitters (T1) in the network centre to a common reference frequency source (CFC) and, moreover, per duplex connection, locking (at a fixed frequency distance) the frequency (f2) of the subscriber's transmitter (T2) to the transmission signal (t1) as received from the network centre's transmitter (T1).Per duplex connection only the subscriber's local oscillator (L2) has to be tuned so that the transmission signal from the network centre is received optimally. If the subscriber's local oscillator is tuned thus and the subscriber transmitter's frequency has the right frequency offset to the tuned local oscillator frequency (f4), at the network centre's side, signals from the subscriber's transmitter will be received optimally too if the local oscillator (L1) of the network centre's receiver (R1) is set at a certain (predetermined) frequency offset to the signal transmitted to the subscriber's receiver. Frequency setting, at the network centre's side and at the subscriber's side, can be executed by means of auxiliary receivers (R1a,R2a) and AFC-units, generating the various frequency control signals, or by means of the receivers (R1,R2) already in use, provided with multiple pass filters and AFC-units. For achieving relative low IF frequencies, certain frequency orders are preferred.

Method for sampled data frequency control of an ultrasound power generating system

Abstract: A method for automatically optimizing ultrasonic frequency power applied by a transducer to human tissue while the transducer is energized with ultrasonic signals from an ultrasonic signal generator. The frequency of an ultrasonic energizing signal applied by the ultrasonic signal generator to the transducer is set. The frequency of the energizing signal applied to the ultrasonic signal generator to the transducer is scanned, at reoccurring intervals, through a sequence of frequencies. The optimum level of power from the transducer is monitored as the frequency is scanned. The frequency of the ultrasonic energizing signal applied by the ultrasonic signal generator is ultimately reset, substantially at the frequency that causes the optimum level of power, until the next reoccurring interval.

Frequency Domain Laser Velocimeter Signal Processor

Abstract: A new scheme for processing signals from laser velocimeter systems is described. The technique utilizes the capabilities of advanced digital electronics to yield a signal processor operating in the frequency domain maximizing the information obtainable from each signal burst. This allows a sophisticated approach to signal detection and processing with a more accurate measurement of the chirp frequency resulting in an eight-fold increase in measurable signals over present high-speed burst counter technology. Further, the required signal-to-noise ratio is reduced by a factor of 32 allowing measurements within boundary layers of wind tunnel models. Measurement accuracy is also increased up to a factor of five.

Automatic frequency control circuit

Abstract: An AFC circuit for use in a chrominance signal processing circuit of a VTR basically includes a VCO (9), a frequency divider (10-13) for frequency-dividing an output of the VCO, and a phase comparing circuit (17) for comparing phases of the output of the divider and a horizontal synchronizing signal extracted from an inputted video signal to supply an error output to the VCO When a phase relation between the output of the divider and the horizontal synchronizing signal becomes a miss-locked state out of the phase-locked state, a frequency-dividing operation is stopped at a timing corresponding to the rising edge rise of a normally inputted signal in a phase-locked state and the frequency-dividing operation is restarted after the inputted horizontal synchronizing signal is counted (22) by a predetermined number As a result, the phase-locked state of the inputted horizontal synchronizing signal and the output signal of the divider (10-13) is forcibly restored