Showing papers on "Capacitor published in 1992"

Laser surgical unit

Abstract: Apparatus monitors RF return current to maximize the AC signal of impedance at two return electrodes. A transformer with driving and driven windings isolates ESU and patient. At ends of the driving winding are signal and ground terminals joined to the return electrodes with capacitors returning current. An AC coupling capacitor at the signal terminal has a timing circuit in sync to the voltage wave and relative to impedance of the return electrodes. Microprocessing the voltage at the signal terminal of the driving winding watches impedance and determines if the RF return current path is adequate. Voltage detection within the timing circuit has a voltage shaping circuit. A voltage comparator after the voltage detection forms a square wave. A current detection circuit and a coupling capacitor allow AC flow to the driving winding. Current shaping circuit in the current detection circuit has a voltage comparator at the output to form a square wave. Phase detection at the voltage and current detection circuits outputs filters the phase difference that is sampled and held as DC input to a switch, with an output and a few inputs to DC voltages. Phase locking an oscillating voltage source directly and/or through the sample and hold or DC switch tunes oscillation frequency and maximizes the voltage detection circuit output. Monitoring the return current with a signal from the voltage detection circuit connected to an oscillating voltage that is phase locked to the current phase therein shows that no phase difference and maximum signal voltage occur simultaneously.

Robust OP Amp realization of Chua's circuit

Abstract: Chua's circuit is a simple electronic network which exhibits a variety of bifurcation phenomena and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. This paper describes the design methodology for a robust practical op amp implementation of Chua's circuit. In addition, we present experimental results and SPICE simulations for a working circuit using o -the-shelf components.

Integrated high quality rectifier-regulators

Abstract: A family of AC-to-DC converters which integrate the functions of low harmonic rectification, low frequency energy storage, and wide bandwidth output voltage control into a single converter containing one, two, or four active switches is presented. These converters utilize a discontinuous conduction mode input inductor, an internal energy storage capacitor, and transformer secondary circuits which resemble the bridge, forward, flyback, or Cuk DC-DC converters. A large-signal equivalent circuit model for this family which uses the loss-free resistor concept is presented. Design strategies and experimental results are given. High performance regulation with satisfactory line current harmonics is demonstrated with conventional duty ratio control. Further improvements in line current are possible by simultaneous duty ratio and switching frequency control. >

Implantable cardiac defribrillator with improved capacitors

Abstract: An implantable cardiac defibrillator is provided having an energy source, a capacitor, and means coupled to the energy source for charging the capacitor. The capacitor comprises a planar layered structure of anode plates, cathode plates and means separating the anode plates and cathode plates. A polymeric envelope containing electrolyte encloses the layered structure. Electrical contact means extend from the anodes and cathodes to outside the envelope.

Design criteria for SEPIC and Cuk converters as power factor preregulators in discontinuous conduction mode

Abstract: SEPIC and Cuk converters present a great advantage over boost and fly-back topologies in discontinuous conduction mode (DCM): an input current with low harmonic content can be obtained by correctly choosing the inductors L/sub 1/ and L/sub 2/ of the converter with a fixed operation frequency, as is demonstrated here. The authors also discuss the intermedium capacitor C/sub 1/ as well as some advantages and disadvantages of the application. Simulation and experimental results support the approach. It is concluded that SEPIC and Cuk converters in DCM seem to be good choices for use as power factor preregulators. >

A high-power-factor buck converter

Abstract: A high-power-factor buck converter is proposed. The converter is composed of rectifier diodes, a small input capacitor, and a buck converter. It supplies low output voltages and uses low voltage semiconductor devices and ceramic capacitors. Two operation modes exist in the converter: discontinuous and continuous inductor current modes. Analysis and experimentation show that the converter's power factor is over 0.9 in discontinuous mode by constant duty ratio operation. It is clarified that the power factor decreases to about 0.7 in continuous mode by constant duty ratio operation, and it can be improved to over 0.9 by a new input current control system. >

Thin-oxide damage from gate charging during plasma processing

Abstract: The plasma-induced charge damage to small gate gate MOS capacitors is investigated by using 'antenna' structures. After an O/sub 2/ plasma step the interface state density increases with increasing antenna area and varies by two orders of magnitude. A hole trapping-induced breakdown mechanism during plasma charging is supported by experimental evidence which includes annealing and polarity effects for charge to breakdown and tunneling currents. In addition, oxide susceptibility is shown to depend on oxide growth conditions and is predictable by negative bias-temperature aging. >

Method of forming a stacked capacitor with striated electrode

Abstract: A method of forming a capacitor on a semiconductor wafer includes: a) in a dry etching reactor, selectively anisotropically dry etching a capacitor contact opening having a minimum selected open dimension into an insulating dielectric layer utilizing selected gas flow rates of a reactive gas component and an inert gas bombarding component, the flow rate of the bombarding component significantly exceeding the flow rate of the reactive component to effectively produce a capacitor contact opening having grooved striated sidewalls and thereby defining female capacitor contact opening striations; b) providing a layer of an electrically conductive storage node material within the striated capacitor contact opening; c) removing at least a portion of the conductive material layer to define an isolated capacitor storage node within the insulating dielectric having striated sidewalls; d) etching the insulating dielectric layer selectively relative to the conductive material sufficiently to expose at least a portion of the external male striated conductive material sidewalls; and e) providing conformal layers of capacitor dielectric and capacitor cell material atop the etched conductive material and over its exposed striated sidewalls. The invention also includes a stacked capacitor construction having an electrically conductive storage node with upwardly rising external sidewalls. Such sidewalls have longitudinally extending striations to maximize surface area and corresponding capacitance in a resulting construction.

Characteristics of load resonant converters operated in a high-power factor mode

Abstract: The performance of the parallel resonant power converter and the combination series/parallel resonant power converter (LCC converter) when operated above resonance in a high power factor mode are determined and compared for single phase applications. When the DC voltage applied to the input of these converters is obtained from a single phase rectifier with a small DC link capacitor, a relatively high power factor inherently results, even with no active control of the input line current. This behavior is due to the pulsating nature of the DC link and the inherent capability of the converters to boost voltage during the valleys of the input AC wave. With no active control of the input line current, the power factor depends on the ratio of operating frequency to tank resonant frequency. With active control of the input line current, near-unity power factor and low-input harmonic currents can be obtained. >

Optical touch input device

Abstract: An optical touch input device comprises an array of actively addressed sensing elements (18) for sensing a light input, e.g. from a light pen, each of which comprises a capacitor (25) which is charged periodically through operation of a switch device (24) and a discharge circuit, including a photosensitive device (28) and a further switch device (27) connected across the capacitor, which circuit in operation demonstrates an optical threshold characteristic whereby the capacitor (25) is discharged in response to the sensing elements being subjected to light which is at or above a predetermined intensity level so as to discriminate from ambient light. Elements written into are determined by detecting the charge stage of their capacitors. The sensing element array can be integrated with a matrix display device with the sensing elements (18) and display elements components (12) provided on a common support using thin film technology.

A novel charge sensitive preamplifier without the feedback resistor

Abstract: A novel charge sensitive preamplifier which has no resistor in parallel with the feedback capacitor is presented. No external device or circuit is required to discharge the feedback capacitor. The detector leakage and signal current flows away through the gate of the first JFET which works with its gate to source junction slightly forward biased. The DC stabilization of the preamplifier is accomplished by an additional feedback loop, which permits to equalize the current flowing through the forward baised gate to source junction and the current coming from the detector. An equivalent noise charge of less than 20 electrons r.m.s. has been measured at room temperature by using an input JFET with a transconductance to gate capacitance ratio of 4 mS/5.4 pF.

Method and apparatus for measuring a parameter of a gas in isolation from gas pressure fluctuations

Abstract: In measuring a selected parameter of a test gas in isolation from gas pressure fluctuations, a pump draws the test gas through a storage capacitor into a sensor, storing the gas in the storage capacitor. A valve closes a fluid flow path which admits the test gas to the storage capacitor and opens a fluid flow path between the storage capacitor and a constant pressure alternate gas source, isolating the storage capacitor and the sensor from pressure fluctuations in the test gas. The storage capacitor prevents any mixing of the test gas with the alternate gas until measurement of the selected parameter has been accomplished.

Thin film capacitor

Abstract: There is provided a thin film capacitor including (a) a semiconductor substrate, (b) an interlayer insulating film formed on the semiconductor substrate, (c) a contact formed throughout the interlayer insulating film such that the contact has an upper surface upwardly projecting, (d) a lower electrode formed on the interlayer insulating film such that the lower electrode covers the upper surface of the contact therewith, (e) a capacitor insulating film covering the lower electrode and the interlayer insulating film therewith, and (f) an upper electrode formed on the capacitor insulating film The thin film capacitor prevents peeling between the contact and the lower electrode even in an annealing step

Optimized modulation techniques for the generalized N-level converter

Abstract: A balancing control strategy that allows the voltage differences among the DC link capacitors of the generalized n-level power converter to be minimized is presented. The case n=3 is treated, but the technique can be generalized to larger n values. The balancing algorithm does not achieve correct voltage sharing of the capacitors under all operating conditions, but it provides a great improvement. This strategy appears to be very promising in single-phase applications, for which nonredundant switching configurations do not affect the capacitor voltage balance. >

Mass production method for the manufacture of surface mount solid state capacitor and resulting capacitor

Abstract: A method of simultaneously forming a multiplicity of surface mountable solid state capacitors is disclosed. The method comprises mounting on a substrate a wafer of powdered solid state capacitor forming metal, sintering the wafer and metal together to fuse the interface between wafer and substrate to each other and convert the wafer into a porous integral mass, dividing the sintered wafer into a multiplicity of mutually spaced sub-units, isolating the interface or boundary between the substrate and sub-units one from the other by a resin infusion or by a dielectric deposition step, causing the sub-units to be converted to capacitors by sequential anodizing and manganizing steps, bonding a cathode plate to the counter electrode components present on the upper surfaces of the sub-units in electrical contact therewith, filling the voids between adjacent sub-units with insulative resin material by injecting same between the plates utilizing the plates as elements of a mold, and after hardening of the resin sawing through the plates and hardened resin to define discrete encapsulated capacitors. The disclosure further teaches solid state capacitors formed by the noted method.

Steady-state analysis and design of a switched-capacitor DC-DC converter

Abstract: A switched capacitor DC-DC power converter topology which consists of n stages of semiconductor switches and capacitors is described The switches connect the capacitors across the input source during the charging phase and then across the load during the discharge phase to step down the input voltage by a nominal ratio n Further control of the output voltage is possible via current, resistive, or duty-ratio control Based on the observation that the ripple on the capacitor voltages is generally linear in practice, state-space averaging is used to derive the average state-space equations for a generalized n-stage switched capacitor converter circuit Both exact and approximate equations which are useful for design are derived for the practical performance parameters A design procedure based on these equations is described The analytical results have been verified by extensive simulation by PSPICE >

Capacitor-carrying semiconductor module

Abstract: Noise generated at high frequencies at the time of simultaneous switchings of logical circuits is reduced by lowering an inductance from LSI to a capacitor formed on a substrate. The capacitor is formed to ensure that an inductance from a bonding pad for the LSI loaded on the substrate to an electrode of the capacitor is 0.05 nanohenry. The lower inductance from the LSI to the capacitor allows a reduction in the amount of the noise at high frequencies among those generated in power supply system, whereby the rising time of signals is made shorter, and the speed of arithmetic operation can be increased.

Method for producing a roughened surface capacitor

Abstract: A new method to produce a microminiturized capacitor having a roughened surface electrode is achieved. The method involves depositing a first polycrystalline or amorphous silicon layer over a suitable insulating base. The silicon layer is either in situ heavily, uniformly doped or deposited undoped and thereafter heavily doped by ion implantation followed by heating. The structure is annealed at above about 875° C. to render any amorphous silicon polycrystalline and to adjust the crystal grain size of the layer. The polysilicon surface is no subjected to a solution of phosphoric acid at a temperature of above about 140° C. to partially etch the surface and cause the uniformly roughened surface. A capacitor dielectric layer is deposited thereover. The capacitor structure is completed by depositing a second thin polycrystalline silicon layer over the capacitor dielectric layer.

Trigger circuit unit for operating light emitting members such as leds or motors for use in personal ornament or toy in synchronization with music

Abstract: A trigger circuit unit including: a forward circuit block having a pickup circuit such as a microphone for picking up a signal of music so as to convert it into an electric signal; a filter circuit for selecting a portion of the band from a picked up audible frequency band; and a limit amplifier circuit mainly composed of an inverter operation logic IC for amplifying the selected electric signal having a portion of the band and transmitting an output having a predetermined amplitude; and a waveform conversion circuit block having a time constant circuit connected to the output of the forward circuit block and composed of a capacitor having one or more diodes connected in series and a resistor in order to prevent a backflow and to obtain a forward directional voltage difference, wherein analog pulse signals transmitted from the time constant circuit are caused to perform a Schmidt operation having a previously adjusted degree of hysteresis, wherein the rectangular pulse signals transmitted from the waveform conversion circuit block in accordance with the electric signals which correspond to the music signals each having a partial band picked up, selected and amplified in the forward circuit block are transmitted as basic trigger signals for operating light emitting members such as LEDs or motors.

Zero voltage switching pulse width modulated power converters

Abstract: The power converter of this invention accomplishes zero voltage switching at both turn on and turn off transitions of a primary switch (206). A transformer (218) serves as both energy storage device and isolation mechanism. Inductance (216) placed in series with transformer (218) provides energy to drive the turn on resonant switching transition of switch (206). Additional energy storage is provided by a required primary side filter capacitor (220) and an output filter capacitor (224). During a first operational state in which switch (206) conducts, energy is transferred from power source (202) to transformer (218) and capacitor (220). During the first state, capacitor (224) supports a load (226). During a second operational state, a second primary switch (212) and a secondary switch (234) conduct and energy is transferred from capacitor (220) and transformer (218) to series inductance (216), capacitor (224) and load (226). The resonant transition from the first state to the second state is driven by some combination of stored energy in transformer (218) and inductor (216). The AC magnetizing currents and AC magnetic fields of transformer (218) can be made smaller than the average magnetizing current and the average magnetic field, respectively, and the converter can accomplish zero voltage switching at all line and load conditions.

Ferroelectric memory cell arrangement having a split capacitor plate structure

Abstract: A ferroelectric memory cell architecture in which a pair of cells is fabricated so as to share common elements, and wherein ferroelectric capacitors are fabricated overlying the associated select transistors, thereby achieving a small-area cell architecture. First level refractory metal interconnects formed prior to ferroelectric material deposition steps are utilized with subsequently formed second metallization layers to provide interconnections between the ferroelectric capacitor plates and the underlying transistor regions.

Circuit assemblies of printed circuit boards and telecommunications connectors

Abstract: In a circuit assembly of two connectors and a printed circuit board positioned between them, a parasitic reactive coupling is created by the connectors. In the circuitry of the circuit board a compensating reactive coupling is provided. This is at least partly formed by lengths of conductor path in the board, which lengths are spaced apart with a specific gap aver a certain distance along the lengths to give a desired inductive compensating coupling. If required, the compensating reactive coupling also includes capacitors provided by capacitor plates forming parts of different conductor paths on opposite sides of the board.

Multi-staged charge-pump with staggered clock phases for providing high current capability

Abstract: A multiple staged charge pump network with staggered clock phases for pumping a first voltage to a second voltage with high current capability. The charge pump includes multiple serial charge pumps connected in parallel, multi-phase clocks, input voltage and output voltage connectors. The multiple serial charge pumps have in each series a plurality of diode-connected n-channel MOSFETs. The first n-channel MOSFET in each series is coupled to the input voltage connector, while the rest of the n-channel MOSFETs are coupled to a pumping capacitor at their diode-connected gates. The clocks are coupled to the multiple serial charge pumps for generating a plurality of phases of clocks with each phase of the clocks being applied to the alternating n-channel MOSFETs in a series such that adjoining n-channel MOSFETs are not driven by the same phase of clock. The input voltage connector is coupled to the first n-channel MOSFET in each series of the multiple serial charge pump for providing an input voltage. The output voltage connector is coupled to the last n-channel MOSFET in each series of the multiple serial charge pump for generating an output voltage after the input voltage is switched-regulated through the multiple serial charge pump.

Binary encoded multiple frequency rf identification tag

Abstract: A tag (10) for identifying an item to which it is attached includes an inductance (L) connected in parallel with a capacitance. The capacitance includes a plurality of individual capacitors (C1, C2, C3, C4, C5), each of a predetermined different capacitance. The individual capacitors (C1, C2, C3, C4, C5) are connected to the inductance (L) to establish a resonant circuit (20) having a predetermined resonant frequency. At least one of the capacitors (C1, C2, C4) includes a dimple (12) for shorting the capacitor when the tag (10) is exposed to electromagnetic energy at the predetermined resonant frequency. The shorted capacitor establishes a second resonant frequency which may be used to identify which capacitor (C1, C2, C4) has become shorted. A binary '1' is assigned to either the shorted capacitor (C1, C2, C4) or the non shorted capacitor (C3, C5) and a binary '0' is assigned to the capacitors which are not assigned a binary '1', the binary '1's and '0's combining to establish a numeric code uniquely associated with the tag (10).

Static and dynamic aspects of an air-gap capacitor

Abstract: This paper deals with the theory of an air-gap capacitor used as a micromechanical resonator. Both static and dynamic aspects are discussed. A single-element approach for the electrostatic excitation and capacitive detection of the vibrational motion of the resonators is described. The non-linear character of the electrostatic force is accounted for in the static analysis. The behaviour of the air-gap capacitor is modelled as a lumped spring-mass system and its limitations are discussed. Also an equivalent electrical one-port network is derived, which can be used in a circuit simulation to account for the mechanical behaviour of the resonator. The results obtained from the spring-mass system are compared with the results obtained from a more elaborate numerical analysis of the air-gap capacitor. The lumped spring-mass system is adequate for modelling the air-gap capacitor.

A balanced 0.9- mu m CMOS transconductance-C filter tunable over the VHF range

Abstract: A balanced transconductance-C biquad implemented in the digital subset of a 0.9- mu m CMOS process operates at frequencies up to 450 MHz and Q factors from a nominal value near 1 to approximately 100 with 30-40-dB dynamic range. By switching in capacitors and adjusting control voltages it can be tuned to below 30 MHz, demonstrating the capability of operating over the entire VHF range. Active area is 0.029 mm/sup 2/ and power consumption is 8-12 mW with a 5-V power supply. >

Class-D zero-voltage-switching inverter with only one shunt capacitor

Abstract: A class-D zero-voltage-switching (also called soft-switching) inverter with only one capacitor in parallel with either transistor, along with an approximate analysis and experimental results, is introduced. The inverter offers both zero turn-on and zero turn-off switching losses, yielding high efficiency at high frequencies. In addition, soft switching reduces switching noise associated with the high-frequency ringing at the switching instants. The transistor voltage stresses are low, similar to those in conventional class-D and pulse-width-modulated inverters. This permits the use of low-on-resistance MOSFETs, reducing the conduction losses. A 50 W class-D inverter was built and tested. The theoretical and experimental results were in good agreement. The inverter combines, low transistor peak voltages and low conduction losses, as in PWM converters, with low switching losses and low noise as in single-ended resonant convertors.

High area capacitor formation using material dependent etching

Abstract: The invention provides a capacitor having increased capacitance comprising one or more main vertical trenches (16) and one or more lateral trenches (18) extending off the main vertical trench. The capacitor has alternating first and second regions (12, 14), preferably silicon and non-silicon regions (for example, alternating silicon and germanium or alternating silicon and carbon regions). The etch characteristics of the alternating regions are utilized to selectively etch lateral trenches thereby increasing the surface area and capacitance of the capacitor. A method of fabricating the capacitors is also provided.

Capacitor used in an integrated circuit and comprising opposing electrodes having barrier metal films in contact with a dielectric film

Abstract: On a first conductor layer of a capacitor element of an IC and in contact with a dielectric film made of a particular dielectric material, a first barrier metal film is made of platinum, palladium, tantalum, or titanium nitride. A second barrier metal film is made of a similar material in contact with the dielectric film and on a second conductor layer. The particular dielectric material is either tantalum oxide or a perovskite oxide, such as strontium titanate or a composite of lead zirconate and lead titanate. In cooperation with such a dielectric film, the first and the second barrier metal films make it possible to provide a compact capacitor having a great and reliable capacitance. The capacitor element is manufactured like a conventional one except for use of the particular dielectric material and for manufacturing steps of forming the first and the second barrier metal films and may be an MOS, MIS, or MIM capacitor or a multilayer wired capacitor.

RMS, DC, peak, and harmonic currents in high-frequency power-factor correctors with capacitive energy storage

Abstract: The RMS, DC, and peak currents for five important power factor correctors with capacitive energy storage are presented. The correctors are a boost power converter with average current control and hysteretic control, a buck-boost power converter with automatic control, and a buck power converter with pulse width modulation (PWM) sinewave line current and modified sinewave line current. In the calculation of the current in the storage capacitor of the boost corrector with average current control, the effect of switched load is taken into account and a simple solution is recommended to reduce that current. For those correctors where fully sinusoidal line current is not achievable the line harmonics are also determined. >