Showing papers on "Cascade amplifier published in 2012"

A Combined Series-Parallel Hybrid Envelope Amplifier for Envelope Tracking Mobile Terminal RF Power Amplifier Applications

Abstract: An improved envelope amplifier architecture for envelope tracking RF power amplifiers is presented, consisting of two switching amplifiers and one linear amplifier. The first switching amplifier and the linear amplifier provide wideband and high-efficiency operation, while the second switching amplifier provides a reduced bandwidth variable supply to the linear amplifier to further reduce power loss. The first switching amplifier and the linear amplifier are fabricated together in a 150 nm CMOS process, while the second switching amplifier is external. Measurements show a maximum average efficiency of 82% for a 10 MHz LTE signal with a 6 dB PAPR at 29.7 dBm output power and an SFDR of 63 dBc for a single tone of 5 MHz driving an 8 Ω load.

A Wideband CMOS/GaAs HBT Envelope Tracking Power Amplifier for 4G LTE Mobile Terminal Applications

Abstract: A high-efficiency envelope tracking power amplifier for long-term evolution (LTE) handset mobile terminals is presented. The envelope amplifier consists of a wideband buffered linear amplifier as a voltage source and a hysteretically controlled switching amplifier as a dependent current source. The linear amplifier has a high current drive capability of approximately 500 mA while consuming only 12 mA of quiescent current. The impact of envelope shaping on system efficiency and stability is investigated. The envelope amplifier is implemented in a 0.15- μm CMOS process and tested with a GaAs HBT RF power amplifier. For a 20-MHz LTE signal with 6.6-dB peak-to-average power ratio, an overall efficiency of 43% is achieved at 29-dBm RF output power level with relative constellation error below 1.9% after digital pre-distortion.

Behaviors of Class-F and Class- ${\hbox{F}}^{-1}$ Amplifiers

Abstract: Operational behaviors of the class-F and class-F-1 amplifiers are investigated. For the half-sinusoidal voltage waveform of the class-F-1 amplifier, the amplifier should be operated in the highly saturated region, in which the phase relation between the fundamental and second harmonic currents are out-of-phase. The class-F amplifier can operate at the less saturated region to form a half sinewave current waveform. Therefore, the class-F-1 amplifier has a bifurcated current waveform from the hard saturated operation, but the class-F amplifier operates as a switch at the saturated region for a second harmonic tuned half-sine waveform. To get the hard saturated operation, the fundamental load is very large, more than √2 times larger than that of the tuned load amplifier. The operational behaviors of the amplifiers are explored with the nonlinear output capacitor. Since the capacitor generates a large second harmonic voltage with smaller higher order terms, the class- F-1 amplifier with the nonlinear capacitor can deliver the proper half-sinusoidal voltage waveforms at a lower power, but the effect of the nonlinear capacitor is small for the class-F amplifier. The class-F-1 amplifier delivers the superior performance at the highly saturated operation due to its larger fundamental current and voltage generation at the expense of the larger voltage swing. The simulation results lead to the conclusion that the class-F-1 amplifier with the nonlinear capacitor is suitable topology for high efficiency. However, in the strict sense, the class- F-1 amplifier with the nonlinear capacitor is not the classical class-F-1 amplifier because the voltage-shaping mechanisms and the fundamental load are quite different. We call it the saturated amplifier since the amplifier is the optimized structure of the power amplifier operation at the saturated mode.

Control circuit and method for controlling an operation of a power amplifier

Abstract: A control circuit and a method for controlling an operation of a power amplifier core are provided. The power amplifier core is switchable between an envelope tracking operation mode and a non-envelope tracking operation mode. The control circuit is configured to provide a control signal for controlling the operation of the power amplifier core or to process an amplified signal received from the power amplifier core in dependence on the operation mode of the power amplifier core.

Low noise amplifiers for carrier aggregation

Abstract: Low noise amplifiers (LNAs) supporting carrier aggregation are disclosed. In an exemplary design, an apparatus includes first and second amplifier stages, e.g., for a carrier aggregation (CA) LNA or a multiple-input multiple-output (MIMO) LNA. The first amplifier stage receives and amplifies an input radio frequency (RF) signal and provides a first output RF signal to a first load circuit when the first amplifier stage is enabled. The input RF signal includes transmissions sent on multiple carriers at different frequencies to a wireless device. The second amplifier stage receives and amplifies the input RF signal and provides a second output RF signal to a second load circuit when the second amplifier stage is enabled. Each amplifier stage may include a gain transistor coupled to a cascode transistor.

Multimode RF amplifier system

Abstract: Multimode radio frequency (RF) amplifier systems and techniques are disclosed. In one embodiment, a multimode radio frequency (RF) amplifier system has a first RF amplifier and a second RF amplifier. The first RF amplifier may support a first RF communication standard. The second RF amplifier may support a second RF communication standard. The first RF amplifier includes an auxiliary circuit. The auxiliary circuit may provide a service or a utility to a second RF amplifier. For example, the auxiliary circuit may generate a supply voltage to power the second RF amplifier.

Linear amplifier power supply modulation for envelope tracking

Abstract: Circuitry, which includes a linear amplifier and a linear amplifier power supply, is disclosed. The linear amplifier at least partially provides an envelope power supply signal to a radio frequency (RF) power amplifier (PA) using a selected one of a group of linear amplifier supply voltages. The linear amplifier power supply provides at least one of the group of linear amplifier supply voltages. Selection of the selected one of the group of linear amplifier supply voltages is based on a desired voltage of the envelope power supply signal.

Time-reversal duality of high-efficiency RF power amplifiers

Abstract: The similarity between RF power amplifiers and rectifiers is discussed. It is shown that the same high-efficiency harmonically-terminated power amplifier can be operated in a dual rectifier mode. Nonlinear simulations with a GaN HEMT transistor model show the time-reversal intrinsic voltage and current waveform relationship between a class-F amplifier and rectifier. Measurements on a class-F-1 amplifier and rectifier at 2.14 GHz demonstrate over 80% efficiency in both cases.

Envelope Amplifier Based on Switching Capacitors for High-Efficiency RF Amplifiers

Abstract: Modern transmitters usually have to amplify and transmit signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B, or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio. The Kahn envelope elimination and restoration technique is used to enhance the efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class E) with a highly efficient envelope amplifier in order to obtain a linear and highly efficient RF amplifier. This paper presents a solution for the envelope amplifier based on a multilevel converter in series with a linear regulator. The multilevel converter is implemented by employing voltage dividers based on switching capacitors. The implemented envelope amplifier can reproduce any signal with a maximum spectral component of 2 MHz and give instantaneous maximum power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, the implemented prototypes have up to 20% higher efficiency than linear regulators used as a conventional solution.

A three-stage cascaded distributed amplifier with GBW exceeding 1.5THz

Abstract: A three-stage cascaded distributed amplifier is designed in a 0.13µm SiGe BiCMOS process. By optimizing the amplifier both at the architecture and element level, an extremely large measured gain-bandwidth product in excess of 1.5THz is obtained. The core amplifier consumes 75mA from a 3.3V supply and provides an average gain of 24dB from 15GHz to at least 110GHz (limited by equipment BW). A distributed RF-choke design is employed to provide the bias current to the three cascaded stages. The pass-band gain stays between 23 and 26.5dB.

Highly Efficient Dual-Switch Hybrid Switching Supply Modulator for Envelope Tracking Power Amplifier

Abstract: This letter describes a highly efficient dual-switch hybrid switching supply modulator for an envelope tracking power amplifier (PA). The supply modulator has a combined structure of a linear amplifier and a switching amplifier. For an improved efficiency, the switching amplifier employs two buck converters and realizes an adaptive slew rate control of the switching amplifier's current. An implemented envelope tracking PA delivers an efficiency of 39.1% at an output power of 27 dBm for long term evolution signal with 10 MHz channel bandwidth.

Inductance based parallel amplifier phase compensation

Abstract: A direct current (DC)-DC converter, which includes a parallel amplifier and a switching supply, is disclosed. The switching supply includes switching circuitry, a first inductive element, and a second inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The second inductive element is coupled between the feedback input and the parallel amplifier output.

Class e amplifier overload detection and prevention

Abstract: Systems, methods and apparatus are disclosed for amplifiers for wireless power transfer. In one aspect a method is provided for controlling operation of an amplifier, such as a class E amplifier. The method may include monitoring an output of the amplifier. The method may further include adjusting a timing of an enabling switch of the amplifier based on the output of the amplifier.

Converting a Three-Stage Pseudoclass-AB Amplifier to a True-Class-AB Amplifier

Abstract: We convert a low-voltage low-transistor-count wide-swing multistage pseudoclass-AB amplifier proposed by Mita et al. to a true-class-AB amplifier. The conversion is made possible using gate-drain feedback to combine two inverting common- source amplifiers to form a single noninverting stage. Both the pseudoclassand true-class-AB amplifiers were fabricated in a 0.5-μm CMOS 2P3M process. They are designed to operate from ±1.25-V supplies at a nominal quiescent current of 175 μA and a minimum phase margin of 45° when driving capacitive loads from 1 to 200 pF and resistive loads from 500 Ω to 1 MΩ. The total com- pensation capacitance of the proposed class-AB amplifier is 12 pF, which is 50% less than the pseudoclass-AB amplifier. The simu- lated unity-gain frequency of the class-AB amplifier is 4.9 MHz at a load of 25 pF||1kΩ, which is 88% higher than that of the pseudoclass-AB amplifier. Experimental measurements show that the proposed amplifier has a maximum total bias current of 175 μA, as compared with 1.05 mA for the pseudoclass-AB am- plifier. Measured slew rates of the proposed amplifier are 2.7 and 3.3 V/μs, twice as much as those of its pseudoclass-AB counterpart.

A High-PSRR Reconfigurable Class-AB/D Audio Amplifier Driving a Hands-Free/Receiver 2-in-1 Loudspeaker

Abstract: A high-power-supply-rejection-ratio (PSRR), reconfigurable class-AB/D audio power amplifier is designed for direct battery hookup in portable applications. The proposed design employs the on-chip battery voltage tracking common-mode reference (BAVTCMR) generator and the pseudo-differential topology to achieve the high SNR requirement in a hands-free/receiver 2-in-1 loudspeaker. This amplifier can achieve 106 dB/100 dB PSRR at 217 Hz and 1 kHz, respectively. In receiver mode, this design can drive 46 mW into an 8- Ω load. A true 100-dB SNR is also achieved when a global system for mobile communications (GSM) is generating ripple noise on the system power lines. Reconfiguration is implemented by employing the low-noise operational amplifier (opamp) and capacitors in the class-D integrator as the first gain stage and the compensation capacitors, respectively, in a class-AB amplifier. Hence, the hardware redundancy and the design complexity are both minimized. Fabricated with 0.153-μm CMOS technology, 74-dB/76-dB THD are achieved for class-AB and class-D, respectively. More than 90% efficiency is achieved in class-D mode operation. The maximum output power at 1% THD is 1.23 W. The active area of the prototype class-AB/D amplifier is 0.5 mm2.

Method and apparatus for circuit with low IC power dissipation and high dynamic range

Abstract: An apparatus comprises a selected volume detector that detects a selected output volume; an analog output signal amplifier; a digital volume amplifier; a boost gain control element coupled to the selected volume detector; the analog output signal amplifier; and the digital volume amplifier; wherein the boost gain control element is configured to: keep a gain of a path of the digital volume amplifier and the analog output signal amplifier substantially constant, wherein the boost gain control element can adjust both: a) a gain of the digital volume control; and b) a gain of the analog output signal amplifier; to keep the gain of the path of the digital volume amplifier and the analog output signal substantially constant and equal to the selected output volume.

High-frequency amplifier module and high-frequency amplifier module unit

Abstract: A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1 , and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7 . The driver-stage amplifier 3 is fabricated on a silicon substrate 11 , while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.

Capacitive level-shifting circuits and methods for adding DC offsets to output of current-integrating amplifier

Abstract: Capacitive level-shifting circuits and methods are provided for adding DC offsets to the output of a current-integrating amplifier For example, a current-integrating amplifier includes an input amplifier stage and an output offset circuit The input amplifier stage includes an input node, a first output node, and a first switch connected between the first output node and a power supply node The output offset circuit is connected to the first output node of the input amplifier stage and to a second output node of the current-integrating amplifier The output offset circuit includes a first series capacitor coupled between the first output node of the input amplifier stage and the second output node of the current-integrating amplifier The output offset circuit switchably connects a bias voltage to the second output node and charges the first series capacitor to add a DC offset to the second output node of the current-integrating amplifier

Modular 20 kW solid state RF amplifier for Indus-2 syncrotron radiation source

Abstract: This article presents the design and development of 5058 MHz modular solid state Radio frequency (RF) amplifier capable of delivering 20 kW continuous RF power It has been successfully commissioned for serving as the modern RF power source in Indus-2 synchrotron radiation source For this amplifier, design procedure has been formulated for the solid state amplifier modules, radial combiner, divider, directional coupler and overall system architecture, with specifications suited to RF source for particle accelerator This article describes underlying design principles and indigenous development of this amplifier, consisting of 400 W amplifier modules, 5 kW 16-port radial combiner/divider and directional couplers Detail performance characterization of amplifier on component level as well as system level serves as useful data for higher power solid state amplifier designers Simple design, indigenous technology, high efficiency and ease of fabrication, are the main features of this design

Hybrid Envelope Amplifier for envelope tracking power amplifier transmitters

Abstract: This paper presents an envelope tracking (ET) Power Amplifier (PA) whose architecture includes an efficient Envelope Amplifier (EA) and a bandwidth reduction algorithm suitable for real time applications. The EA consists of a hybrid amplifier combining switched and linear amplification. A bandwidth and slew-rate reduction algorithm has been incorporated in order to allow wide-band envelope amplifications. Non-linearities introduced by the Hybrid EA (HEA) and the dynamic supply are compensated with Digital Pre-Distortion. The ET PA has been tested using 64-QAM signals and commercial devices. Results show that non-linearities produced by the HEA are compensable and that the architecture provides efficiency improvements compared to the conventional linear EA.

Amplifier device and corresponding radio base station and mobile communication terminal

Abstract: It is presented an amplifier device comprising: a primary amplifier arranged to receive at least part of an input signal; a secondary amplifier arranged to receive at least part of the input signal; a first directional coupler device, wherein one input of the first directional coupler device is connected to the primary amplifier and a second input of the first directional coupler device is connected to the secondary amplifier; and a first multiband termination device arranged to reflect signals with a predetermined reflection phase in at least two frequency bands. One output of the first directional coupler device is a main output of the amplifier device and a second output of the first directional coupler device is connected to the first multiband termination device. A corresponding radio base station and mobile communication terminal are also presented.

Design and characterization of 50 kW solid-state RF amplifier

Abstract: Radio frequency (RF) and microwave amplifier research has been largely focused on solid-state technology in recent years. This paper presents design and performance characterization of a 50-kW modular solid-state amplifier, operating at 505.8 MHz. It includes architecture selection and design procedures based on circuit and EM simulations for its building blocks like solid-state amplifier modules, combiners, dividers, and directional couplers. Key performance objectives such as efficiency, return loss, and amplitude/phase imbalance are discussed for this amplifier for real-time operation. This amplifier is serving as the state-of-the-art RF source in Indus-2 synchrotron radiation source. Characterization on component level as well as system level of this amplifier serves useful data for RF designers working in communication and particle accelerator fields.

Electronic devices with multiple amplifier stages and methods of their manufacture

Abstract: An embodiment of an electrical device includes a device package and a plurality of amplifier paths physically contained by the device package. Each amplifier path includes an amplifier stage electrically coupled between an input and an output to the amplifier stage, and the amplifier stages of the plurality of amplifier paths are symmetrical. In a further embodiment, the amplifier paths have translational symmetry within the device package. In another further embodiment, transistors comprising the amplifier stages of the plurality of amplifier paths are substantially identical in size. The electrical device may be incorporated into an amplifier system that further includes an external input network and an external output network. For example, the amplifier system may be configured in a Doherty amplifier topology.

Wideband doherty amplifier circuit with peaking impedance absorption

Abstract: A wideband Doherty amplifier circuit includes a main amplifier configured to operate in a linear mode, a peaking amplifier configured to operate in a non-linear mode and a Doherty combiner directly connected to an output of each amplifier so that no output match devices are in the path between the amplifier outputs and the Doherty combiner. The Doherty combiner is configured to present the same load impedance to each amplifier when both amplifiers are conducting and present a modulated load impedance to the main amplifier when the peaking amplifier is non-conducting so that a variation in the VSWR seen by the main amplifier is less than 5% over a plurality of frequency bands and/or so that the peaking amplifier has an off-state impedance spreading of 20 degrees or less over the plurality of frequency bands.

Qualitative analysis of small-signal modified Sziklai pair amplifier

Abstract: A small-signal modified Sziklai pair (complementary Darlington pair) amplifier is proposed with an additional biasing resistance in the circuit. The proposed amplifier produces significantly high voltage gain with narrow bandwidth. Poor response of conventional Darlington pair amplifiers at higher frequencies is found to be absent in the proposed amplifier circuit. Variations in voltage gain as a function of frequency and different biasing resistances, bandwidth and total harmonic distortion of the amplifier have also been studied. Proposed amplifier may be useful for various analog communication applications.

System providing switchable impedance transformer matching for power amplifiers

Abstract: System providing switchable impedance transformer matching for power amplifiers. In an exemplary implementation, an amplifier providing switchable impedance matching includes an output inductor (L1) that is part of an output path of the amplifier and a first amplifier stage comprising a first inductor (L4) coupled to the output inductor, the first inductor configured to couple a signal amplified by the first amplifier stage at a first power level to the output inductor in response to a first enable signal. The amplifier also includes a second amplifier stage comprising a second inductor (L5) coupled to the output inductor, the second inductor configured to couple the signal amplified by the second amplifier stage at a second power level to the output inductor in response to a second enable signal.

RF power amplifier and RF power module using the same

Abstract: The RF power amplifier circuit including multiple amplification stages has a previous-stage amplifier, a next-stage amplifier and a controller. The previous-stage amplifier responds to an RF transmission input signal. The next-stage amplifier responds to an amplification signal output by the previous-stage amplifier. In response to an output-power-control voltage, the controller controls the former- and next-stage amplifiers in quiescent current and gain. In response to the output-power-control voltage, the quiescent current and gain of the previous-stage amplifier are continuously changed according to a first continuous function, whereas those of the next-stage amplifier are continuously changed according to a second continuous function. The second continuous function is higher than the first continuous function by at least one in degree. The RF power amplifier circuit brings about the effect that the drop of the power added efficiency in low and middle power modes is relieved.

Verifying oscillation in amplifiers and the mitigation thereof

Abstract: A method is provided for detecting and mitigating oscillation in an amplifier. The amplifier is configured to sample a signal being amplified to determine whether the amplifier is oscillating. In addition, the status of the amplifier can be verified based on the apparent signal levels of the signals being amplified. The gain of the amplifier is then adjusted in accordance with whether the amplifier is oscillating or as necessary to maintain gain that is compatible with the system within which the amplifier is operating.

High‐Efficiency CMOS Power Amplifier Using Uneven Bias for Wireless LAN Application

Abstract: This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a currentmode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-μm RF-CMOS process with a supply voltage of 3.3 V. The measured gain, P1dB, and efficiency at P1dB are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

Multi-mode power amplifier

Abstract: A multi-mode power amplifier includes a high-power mode amplifier circuit, a mid-power mode amplifier circuit, and a low power amplifier circuit, where the low-power mode amplifier circuit comprises a plurality of independently selectable power cell/amplifier branches. The multi-mode power amplifiers selectively enable or disable amplifier branches to provide multiple levels of amplification. Selectively enabling certain of a plurality of split collector amplifier branches provides multiple low power and ultra-low power amplifier modes without the impedance mismatch or board layout problems associated with an RF switch.