Showing papers on "Electronic design automation published in 1988"

Multi paradigm expert system architecture based upon the inverse design concept

Abstract: The architecture consists of an inference engine, an analysis engine, a graphic engine, and a database management system. A multiparadigm expert-system architecture based on the inverse design concept is proposed. The iterative method for the solution of inverse problems, which is interpreted as a general design process, is implemented in a Prolog environment. This environment is used as a kernel of the architecture, which connects symbolic and numerical computation and realizes the automation of the design process. Functionally gradient material (FGM) design is considered as an example. >

Security and performance optimization of a new DES data encryption chip

Abstract: The implementation of a high-performance data encryption standard (DES) data encryption chip is presented. At the system design level, cryptographical optimizations and equivalence transformations lead to a very efficient floorplan with minimal routing, which otherwise would present a serious problem for data-scrambling algorithms. These optimizations, which do not compromise the DES algorithm nor the security, are combined with a highly structured design and layout strategy. Novel CAD tools are used at different steps in the design process. The result is a single chip of 25 mm/sup 2/ in 3- mu m double-metal CMOS. Functionality tests show that a clock of 16.7 MHz can be applied, which means that a 32-Mb/s data rate can be achieved for all eight byte modes. This is the fastest DES chip reported yet, allowing equally fast execution of all four DES modes of operation, due to an original pipeline architecture. >

Computer-aided design of electrical machines for variable speed applications

Abstract: Product life cycle has decreased and demands for new products have emerged due to competition, modern industrial needs, and rapidly changing technology. This has necessitated changes in design, development, and manufacturing processes to improve quality and efficiency and to reduce cost. Computer-aided design (CAD) helps to meet this challenge in the design evaluation and final product design stages. The authors present the development of interactive software for the optimal design of a motor intended for variable speed applications. The use of finite element analysis methods is proposed as an indispensable part of the CAD system for electrical machine design. An illustration of the method is given for the design of a switched reluctance motor excited with rectangular blocks of current. >

RELIANT: a reliability analysis tool for VLSI interconnects

Abstract: RELIANT is a CAD (computer-aided design) tool which predicts the failure rate of integrated circuit conductors. Circuit layout, device models, and electromigration process data are inputs to RELIANT. The interconnect patterns in a Caltech Intermediate Format (CIF) file are fractured into a number of characteristic segment types. An equivalent circuit is extracted and SPICE is used to determine the transient currents in each segment. Using parametric models for electromigration damage, the failure rate of the system is computed. RELIANT provides designers with feedback on the reliability hazards of a design. Results show the application of the tool to a standard-cell CMOS component. For modeling large VLSI interconnect systems, the incorporation of a switch-level simulator is discussed. >

Automatic location of IC design errors using an E-beam system

Abstract: The ADVICE system discussed is an enhanced CAD (computer-aided design) linked E-beam tester to locate automatically design errors on custom VLSI devices. The goal is met by building a set of procedures to drive the interactive electron-beam debugging (EBD) system according to the strategies devised by the algorithms based on fault dictionary/hierarchical probing algorithm mixed search. >

Physical assembly for analog compilation of high voltage ICs

Abstract: A description is given of the aspects of mixed analog and digital physical assembly relevant to analog silicon compilation. The approach addresses system-level analog design automation through silicon compilation; currently this consists of the synthesis of analog and predesigned digital blocks. The compilation is based on successive decompositions of high-level specifications and physical assembly requirements into those of lower level subblocks and devices. The driving applications are high-voltage application-specific integrated circuits (ASICs). Details of analog and system level physical assembly to satisfy a set of mixed analog, digital, and high-voltage requirements are presented together with the results from an implementation of the compiler. >

The application of artificial intelligence technology to aeronautical system design

Abstract: This paper describes the automation of one class of aeronautical design activity using artificial intelligence and advanced software techniques. Its purpose is to suggest concepts, terminology, and approaches that may be useful in enhancing design automation. By understanding the basic concepts and tasks in design, and the technologies that are available, it will be possible to produce, in the future, systems whose capabilities far exceed those of today's methods. Some of the tasks that will be discussed have already been automated and are in production use, resulting in significant productivity benefits. The concepts and techniques discussed are applicable to all design activity, though aeronautical applications are specifically presented.

Expert system for the functional test program generation of digital electronic circuit boards

Abstract: CAD (computer-aided design)-generated component and interconnection listings are utilized to recreate a circuit design in the form of an associated network. This is stored within an expert system's database and enables a powerful search algorithm, under the guidance of testability formulation rules, to explore the circuit. The algorithm interacts with these device models and register-transfer-logic based device operation rules to identify valid test paths through a circuit and thus define functional tests. Once identified, the tests are ordered (using rule-based and heuristic techniques) in terms of increasing test complexity to aid diagnostics. The test paths are passed on to a low-level test timing generator to produce the actual test vectors required to test the board. >

Rules for fighter cockpit automation

Abstract: The issues and special problems associated with the automation of functions in the fighter aircraft cockpit are discussed. The fighter cockpit has particular design requirements resulting from the critical need to function in combat. Digital avionics permit additional capability, but at a cost of additional workload for the pilot and perhaps even lower reliability and operability. Automation is increasingly seen as the solution to this problem. Automation is defined on a continuum with ten generic levels of delegated functionality. The higher levels are more appropriate for highly reliable, low-critically functions. Sixteen rules for automation of fighter cockpits are presented and discussed. These rules considered preliminary, are presented as a framework for a systematic approach to the automation design problem. >

Description and development of a SAW filter CAD system

Abstract: The authors present a description of the appropriate device models, design methods, and analysis techniques for a real-time surface acoustic wave (SAW) computer-aided design (CAD) system. The approaches presented have been successfully implemented in the creation of a fully integrated SAW filter CAD system for the design of bidirectional and three-phase unidirectional filters on a DEC VAX 11/750 system and for the design of bidirectional filters on an IBM PC-AT computer, which acts as an independent workstation. The focus is on bidirectional transducer design and analysis using the PC-based computer system. CAD analysis of a SAW bidirectional filter is compared to measured parameters. >

A Tactical Framework for Hardware Design

Abstract: This work explores an algebraic approach to digital design A collection of transformations has been implemented to derive circuits, but “hardware compilation” is not a primary goal Paths to physical implementation are needed to explore the approach at practical levels of engineering The potential benefits are more descriptive power and a unified foundation for design automation However, these prospects mean little when the algebra is done manually Hence, a basic, automated algebra is prerequisite to our experimentation with design methods

A network based expert system for intelligent design of mechanisms

Abstract: Linkage-type mechanisms have numerous applications in industry especially for automation Unfortunately, they are less popular due to lack of proper design tools. This paper describes our efforts to remove the technological barrier in mechanisms design automation. Although the ideas presented apply to automation of mechanisms design in general, the paper discusses the development of an expert system for a particular sub-set of mechanisms called Dwell mechanisms. Many essential and desirable motion characteristics of mechanisms are so implicit that they are difficult to control by analytical methods. By systematically and extensively studying the entire motion characteristics of hundreds of linkages, a comprehensive classification system and heuristics were developed. This qualitative classification scheme led to a finite set of linkage models that cover the entire design space in the sense that any possible design falls under one or more of the models. Our system, called Dwell-Expert, incorporates this design expertise to select the best linkage model for a given set of design specifications and to compare that model against alternatives. The new design methodology and its implementation in AGNESS (A Generalized Network-based Expert System Shell) are explained. A design example is also presented. Our system can reduce even an experienced designer’s initial-design time from a day or more to a minute or less, assuming specifications have already been formulated. Such results motivate extension of this design methodology to other areas of mechanical design and engineering design in general.

ADOPT-a CAD system for analog circuit design

Abstract: A description is given of the structure and use of the ADOPT (analog design via optimization) system. The ADOPT system consists of the circuit simulation program HSPICE (Honeywell's version of SPICE), the nonlinear optimization program SUXES-10 (licensed from Meta-Software), and an interface routine called OPTLINK to link the two programs. OPTLINK is set up to pass design parameters and simulation results between SUXES-10 and HSPICE. SUXES-10 passes the initial parameter guess vector to HSPICE. HSPICE then uses these parameters to calculate the desired circuit responses to be optimized and passes the data to SUXES, using PRINT statements. These data are compared to the desired response data and SUXES-10 determines a new set of design parameters to reduce the difference between the two responses. This process continues until SUXES-10 terminates the optimization process. >

Sizing Algorithms for Linear Analog Circuits

Abstract: Basic sizing routines of a synthesis program for MOS analog circuits [1] are presented. A class of routines is given that allows the design of single components as well as basic analog structures for a large domain of operating conditions. These routines can have any of their characteristics imposed as input parameters or output variables. Moreover, a general valid routine useful to size circuits according to 1/f noise, offset and gain specifications is given.

A database management system for a VLSI design system

Abstract: A special-purpose database management system for VLSI design environment is presented. Besides supporting design data management and tools integration, the system provides lots of facilities for supporting fast development of efficient and powerful VLSI CAD tools. This system could simplify the task and reduce errors made in implementing an integrated VLSI design system. >

Towards Simultaneous Performance: Application of Simultaneous Stabilization Techniques to Helicopter Engine Control

Abstract: Despite the impact that the Stable Factorization (SF) approach has had on the academic community, its widespread acceptance and application by industry has been hampered by the natural lag in the development of design algorithms and their associated numerically reliable CAD implementations. Indeed, it is safe to say that computer-aided design support for the Stable Factorization methodology (and in fact, many of the principle design algorithms) have not as yet matured to the point where they may be readily applied by practising engineers. In this paper we describe on-going research aimed at refining one such design algorithm, namely simultaneous stabilization. Through application of the simultaneous stabilization design technique to a realistic aerospace control problem we seek to demonstrate the practical utility of the method, and identify the technical issues that remain to be resolved. The focus of this study is the GE T700 turboshaft engine, when coupled to the Apache and Blackhawk helicopter airframes. We describe our experiences with an indirect design technique to obtain an LTI compensator that simultaneously satisfies two loop-shaping type performance criteria, one for each engine-airframe combination.

Customized architectural methodologies for high-speed image and video processing

Abstract: It is considered that the integration of high-speed consumer digital signal processing (DSP) application requires an efficient IC architecture which is fully adapted to the application at hand. On the other hand, the design time can be reduced substantially by maintaining only a very small cell-library and by applying powerful CAD tools. From the experience collected with a large number of realistic and practical case studies, a selection has been made of promising, efficient architectural strategies that satisfy these constraints. Guidelines for the architectural design process are proposed that depend on the required throughput and the structure of the algorithm and corresponding signal flow-graph. >

APES: an integrated system for behavioral design, simulation and evaluation of array processors

Abstract: The APES system for the design and evaluation of VLSI or WSI array processors is presented. APES makes it possible to study fault-tolerant array architectures and methodologies by simulating the behavior of the system when faults occur: the type and distribution of faults can be defined by the designer. A diagnostic tool is integrated in APES to evaluate the fault-detection and error-correction capabilities of the system under observation. Another tool makes it possible to perform and evaluate the array reconfiguration after fault occurrence by adopting a user-defined strategy. Features including data entry (using a graphic editor or a hardware description language), the simulation engine, the fault injector, the diagnostic evaluator, and the restructuring/reconfiguration manager are discussed. >

Emerging standards for design management systems

Abstract: Standards for engineering design management and guidelines for building design management systems are discussed. Several model for managing electronic product data, managing the design process, and setting up integrated design support environments are reviewed. These models are tied together in an overview of the efforts to the IEEE design automation standard subcommittee (DASS) working group on design management, tasked with producing recommended practices for all aspects of design management. >

Symbolic design methodology for high-density macro-cell

Abstract: A design methodology is proposed for macro-cell design. Macro-cell layout is optimized at symbolic design level. So-called versatile cells are used to make the best use of symbolic layout features. Unnecessary jogs are eliminated by fitting versatile cells into surrounding circuits. If a macro cell is composed of small circuit components, eliminating jogs greatly reduces circuit component connecting area. The stick-diagram-generating system KIMERA was implemented to realize the methodology. >

Software tools speed circuit board design

Abstract: The growing complexity of printed-circuit boards (PCBs) and the concomitant need for computer-aided design (CAD) systems are examined. The features required of CAD systems and how they are used are described. The need for a standard translation mechanism to let the products of one hardware or software supplier substitute directly for those of another is noted. Future trends are identified. >

A DBMS for large design automation databases

Abstract: Large capacity Design Automation (CAD/CAM) database management systems require special capabilities over and above what commercial DBMSs or small workstation-based CAD/CAM systems provide. This paper describes one such system, Tacoma, used at Amdahl Corporation for the storage and retrieval of LSI and VLSI mainframe computer designs Tacoma is based on the relational model with additional object-oriented database features.

A reduced circuit library design system

Abstract: A reduced circuit library using triple-level metal CMOS consisting of nine primitive logic circuits and five latch kernels is proposed for a gate array library. A grouping program has been written to combine these circuits automatically into complex functions which are then hierarchically placed and wired to achieve the density and performance of a more complex library. This approach provides a set of complex functions which is optimized for each specific application while reducing the resource needed for library development and maintenance. >

Device and circuit simulation interface for an integrated VLSI design environment

Abstract: MOSGEN, a program that provides efficient interface between the device simulator, PISCES and the circuit simulator SPICE, is described. Algorithms to generate parameters for SPICE built-in MOS transistor models have been developed and incorporated into MOSGEN. Only six PISCES simulation results are required to generate a complete set of SPICE parameters. This interface program, together with SUPREM, PISCES, and SPICE, form an integrated simulation environment for VLSI design. Such an integrated simulation environment facilitates the designers to examine just how a microscopic fabrication variable, such as implantation dose, affects final device and circuit performance as well as product yield. >