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Showing papers on "Film capacitor published in 1996"


Journal ArticleDOI
TL;DR: In this article, conformal mapping-based models for interdigital capacitors on substrates with a thin superstrate and/or covering dielectric film are given for ICs with finger numbers n/spl ges/2.
Abstract: Conformal mapping-based models are given for interdigital capacitors on substrates with a thin superstrate and/or covering dielectric film. The models are useful for a wide range of dielectric constants and layer thicknesses. Capacitors with finger numbers n/spl ges/2 are discussed. The finger widths and spacing between them may be different. The results are compared with the available data and some examples are given to demonstrate the potential of the models.

400 citations


Journal ArticleDOI
TL;DR: In this article, the material, construction and performance of coin-type capacitors for memory protection and power capacitors, for large power sources are described, and the performance of the capacitor depends not only on the material used but also on the construction of the cells.

168 citations


Patent
Pak K. Leung1, Ismail T. Emesh1
11 Jul 1996
TL;DR: In this article, a capacitor structure and method of forming a capacitance structure for an integrated circuit is provided, comprising a bottom electrode, capacitor dielectric and top electrode, formed on a passivation layer overlying the interconnect metallization.
Abstract: A capacitor structure and method of forming a capacitor structure for an integrated circuit is provided. The capacitor structure, comprising a bottom electrode, capacitor dielectric and top electrode, is formed on a passivation layer overlying the interconnect metallization. The capacitor electrodes are interconnected to the underlying integrated circuit from underneath, through conductive vias, to the underlying interconnect metallization. The method provides for adding capacitors to an otherwise completed and passivated integrated circuit. The structure is particularly applicable for ferroelectric capacitors. The passivation layer acts as a barrier layer for a ferroelectric dielectric. Large area on-chip capacitors may added without affecting the interconnect routing or packing density of the underlying devices, and may be added almost independently of the process technology used formation of the underlying integrated circuit.

75 citations


Patent
04 Apr 1996
TL;DR: In this paper, a power supply using electric double layer capacitors whose output voltages undergo great variations is described. And the power supply further includes first, second, and third switches for switching the capacitors from a parallel connection to a series connection.
Abstract: A power supply using electric double layer capacitors whose output voltages undergo great variations. The power supply further includes first, second, and third switches for switching the capacitors from a parallel connection to a series connection, and a regulating circuit powered by the capacitors. As the output voltages from the capacitors drop, the regulating circuit switches the capacitors from the parallel connection to the series connection. For example, the switches are composed of semiconductor devices. The second and third switches are operated complementarily in relation to the first switch. Electric double layer capacitors producing low terminal voltages can be used. The step-up or step-down ratio can be made smaller. High voltage hazard can be avoided and the efficiency of the power supply can be improved.

57 citations


Patent
12 Apr 1996
TL;DR: In this article, a multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits is described, where the first electrode surfaces are formed by conversion of a conductive transition-metal nitride to an insulating transition metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.
Abstract: A multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits provides (1) capacitor first or bottom electrodes comprising a transition-metal nitride; (2) a capacitor dielectric comprising a transition-metal oxide; (3) capacitor second or top electrodes comprising a transition-metal nitride, a metal or multiple conductive layers; (4) one or more levels of interconnect lines; (5) electrical insulation between adjacent regions as required by the application; and (6) bonding between two regions when such bonding is required to achieve strong region-to-region adhesion or to achieve a region-to-region interface that has a low density of electrical defects. The process for forming the material structures involves formation of the capacitor dielectric on the first electrode surfaces by conversion of a conductive transition-metal nitride to an insulating transition-metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.

54 citations


Journal ArticleDOI
TL;DR: In this article, the authors present an accurate method to measure the short-term effects of dielectric absorption in standard industrial capacitors and discuss the special precautions to be taken to obtain the required accuracy for very short measurement times.
Abstract: In the integrators applied in A-to-D converters, smart sensors and other processing circuits, the accuracy is directly limited by the performance of the integrating element: the capacitor. An important nonideality of the capacitors concerns the short-term effects of dielectric absorption. This paper presents an accurate method to measure these short-term effects and discusses the measurement results for standard industrial capacitors, MOS and junction capacitors, parasitic capacitors of assembling materials and coaxial-cable capacitors. The special precautions to be taken to obtain the required accuracy for very short measurement times are also discussed. It is shown that the dielectric absorption of a commonly used polycarbonate capacitor causes a nonlinearity of 0.6% for a VCO in the frequency range from 1 kHz to 100 kHz. A very large dielectric-absorption effect has been found for commonly used epoxy printed-circuit boards, which means that special care has to be taken when this material is applied in accurate VCOs.

45 citations


Journal ArticleDOI
TL;DR: In this article, temperature-dependent current-voltage characteristics of fully processed Ba0.7Sr0.3TiO3 thin film capacitors integrated in a charge-coupled device delay-line processor as bypass capacitors were studied.
Abstract: Temperature-dependent current-voltage characteristics of fully processed Ba0.7Sr0.3TiO3 thin film capacitors integrated in a charge-coupled device delay-line processor as bypass capacitors were studied. The thin film capacitors with a film thickness of 185 nm were formed by metal-organic decomposition processing. The leakage current measured after completion of the integration process was 1 to 2 orders of magnitude higher than that measured after capacitor patterning. The leakage current at low voltages ( 10 V, 500 kV/cm), the Schottky mechanism plays a dominant role in leakage current, while the Frenkel-Poole emission begins to contribute to the leakage current as the temperature is elevated.

40 citations


Patent
07 May 1996
TL;DR: In this paper, two transparent conductive layers of ITO are formed on opposite sides of an insulating film to form the auxiliary capacitors without deteriorating the aperture ratio of the pixels.
Abstract: An active matrix liquid crystal display having auxiliary capacitors. Two transparent conductive layers of ITO are formed on opposite sides of an insulating film. The first conductive layer forms pixel electrodes. The second transparent conductive film overlaps at least parts of the pixel electrodes via the insulating film to form the auxiliary capacitors without deteriorating the aperture ratio of the pixels.

39 citations


Patent
Katsumi Sameshima1, Shiba Teruo1
24 Sep 1996
TL;DR: In this article, a dielectric film is used to construct a capacitance with a plurality of capacitors, where each of the capacitors includes a lower filmy electrode and an upper filmy unit.
Abstract: A capacitor using a dielectric film wherein plural capacitor units each including one or two capacitor elements are formed on an insulator upper electrodes of at least two capacitor elements of different capacitors units are electrically connected. Each of the capacitors includes a lower filmy electrode, a dielectric film formed on the lower filmy electrode, and an upper filmy electrode formed on the dielectric film. Since plural capacitor units are suitably connected to have desired characteristics, a great deal of flexibility is realized.

38 citations


Journal ArticleDOI
TL;DR: In this paper, a lower bound of 10/sup 19/spl Omega/ on the parallel resistance at an effective frequency of 1 mHz was established for vacuum-gap capacitors with 1 pF of capacitance.
Abstract: We report on measurements of capacitors with about 1 pF of capacitance, which have unmeasurably small leakage at very low frequencies, placing a lower bound of about 10/sup 19//spl Omega/ on the parallel resistance at an effective frequency of 1 mHz. These measurements are made possible by two themes: the use of vacuum-gap capacitors (i.e., no dielectric material, operated in vacuum), and detection of leakage using single electron tunneling (SET) electrometers, which have very high input impedance. We also report on good achieved results in time stability and lack of frequency and voltage dependence.

35 citations


Patent
10 Jun 1996
TL;DR: In this paper, a standard cell design approach for fabrication of the ICs, capacitors are embedded below the power supply lines, called cap-cells, which are placed by the place and route software on either side of each row of standard cells.
Abstract: Integrated circuits running with high frequencies are a potential source for RFI (Radio Frequency Interference). To reduce RFI, on-chip dedoupling capacitors are included in the design. To gain maximum advantage of these decoupling capacitors, they should be placed close to drivers and flip-flops. In a standard cell design approach for fabrication of the ICs, capacitors are embedded below the power supply lines. These capacitors are put in special cells, called cap-cells, which are placed by the place and route software on either side of each row of standard cells. Thin oxide capacitors are preferred because they offer the largest capacitance per area. In addition, first and second metal above the capacitor are increased to form thick oxide capacitors that give additional capacitance.

Patent
14 Nov 1996
TL;DR: In this paper, a semiconductor storage device consisting of a substrate (1) coated with insulating films (6, 8, 10 and 12) in which trenches are formed to accommodate capacitors each of which is composed of a storage electrode (19), a capacitor dielectric film (20), and a plate electrode (21); and buried wiring layers (9 and 11) formed below the capacitors.
Abstract: A semiconductor storage device comprising a semiconductor substrate (1) coated with insulating films (6, 8, 10 and 12) in which trenches are formed to accommodate capacitors each of which is composed of a storage electrode (19), a capacitor dielectric film (20), and a plate electrode (21); and buried wiring layers (9 and 11) formed below the capacitors. Since the capacitors are not formed in the substrate (1), but above the substrate (1), the areas used for the formation of the capacitors have margins and, since the wiring layers (9 and 11) are used as word buses and select lines, the difficulty of forming wiring is relieved. In addition, since the upper surface of an insulating film (32) which is in contact with the lower surface of the wiring (34) in the peripheral circuit area is extended to the memory cell area and brought into contact with the side section of a capacitor (33), the level difference between the peripheral circuit area and memory cell area is reduced remarkably.

Patent
29 Jul 1996
TL;DR: In this article, the authors describe methods of manufacturing large substrate capacitors for multi-chip module applications and the like using procedures compatible with common semiconductor fabrication procedures, where a capacitor is formed where the top electrode thereof is divided into a plurality of segmented pads which are initially electrically isolated from one another.
Abstract: Described are methods of manufacturing large substrate capacitors for multi-chip module applications and the like using procedures compatible with common semiconductor fabrication procedures. A capacitor is formed where the top electrode thereof is divided into a plurality of segmented pads which are initially electrically isolated from one another. Each segmented pad forms a capacitor with the underlying dielectric layer and bottom capacitor electrode. Each segmented capacitor is electrically tested, and defective ones are identified. A conductive layer is thereafter formed over the segmented pads such that the conductive layer is electrically isolated from the pads of defective capacitors. The conductive layer electrically couples the good capacitors in parallel to form a high-value bypass capacitor which has low parasitic inductance. Large embedded MCM bypass capacitors can thereby be fabricated with minimal impact to the overall manufacturing yield. Novel testing methods within a scanning electron microscope environment are also disclosed.

Patent
Chen-Jong Wang1, Jin-Yuan Lee1
20 Mar 1996
TL;DR: In this article, the capacitors are made from a multilayer composed of alternately doped and undoped polysilicon layers formed by in-situ doping in a single LPCVD deposition step.
Abstract: A method is achieved for fabricating a dynamic random access memory (DRAM) storage capacitors having increased capacitance and reduced processing complexity. The capacitor bottom electrodes are made from a multilayer composed of alternately doped and undoped polysilicon layers formed by in-situ doping in a single LPCVD deposition step. The substrate is processed sequentially in the same etching chamber to pattern the multilayer in the RIE mode and then isotropically plasma etch to recess the doped polysilicon layer in the sidewalls of the multilayer. The recessing increases the surface area of the capacitor bottom electrode. The stacked storage capacitors are completed by forming a thin high dielectric constant insulator on the bottom electrode and a top polysilicon electrode. The method reduces processing complexity and manufacturing cost while providing capacitors with increased capacitance.

Patent
Satou Takashi1
17 Jun 1996
TL;DR: In this paper, a liquid crystal display element, a manufacturing method(s) thereof, and electronic devices which can improve, through a simple process, the visual angle characteristics, and the like, of liquid crystal panels is provided.
Abstract: A liquid crystal display element, a manufacturing method(s) thereof, and electronic devices (utilizing this element) which can improve, through a simple process, the visual angle characteristics, and the like, of liquid crystal panels is provided. A first control capacitor electrode (20) is included, provided below first and second sub-pixel electrodes (10, 12) and a protective insulating film (60). Also, control capacitors C1 and C2 are formed by the first and second sub-pixel electrodes (10, 12), and the first control capacitor electrode (20), through the protective insulating film (60). The visual angle characteristics of the liquid crystal panels are improved by the provision of the control capacitors C1 and C2. An increase in processes can be prevented, because the first control capacitor electrode (20) can be formed by a material identical to that of the source electrode. Moreover, the surface area of the control capacitor electrode can be miniaturized, and the aperture rate, and the like, can be improved, as a result of being able to make the protective insulating film (60) even thinner than the gate insulating film (49).

Proceedings ArticleDOI
01 Dec 1996
TL;DR: In this article, the authors used iridium (Ir) as an electrode material for high density (1 Gbit-scale and beyond) dynamic random access memories (DRAMs) and obtained excellent electrical characteristics (e.g. high polarization and low leakage) of BST capacitors with Ir top electrodes.
Abstract: (Ba,Sr)TiO/sub 3/ (BST) thin film capacitors using iridium (Ir) as an electrode material are investigated for high density (1 Gbit-scale and beyond) dynamic random access memories (DRAMs). Excellent electrical characteristics (e.g. high polarization and low leakage) of BST capacitors with Ir top electrodes were obtained. The excellent resistance of these capacitors to hydrogen damage during forming gas anneals is also reported.

Patent
25 Apr 1996
TL;DR: In this article, the neutral point of the star-connected capacitors is connected to the negative side of a capacitor 20 to stabilize the potential to the ground of converters by connecting the neutral points of capacitors of an alternating-current input filter, comprising the capacitors and reactors, to one line in a direct-current circuit.
Abstract: PROBLEM TO BE SOLVED: To stabilize the potential to the ground of each part of converters by connecting the neutral point of capacitors of an alternating-current input filter, comprising the capacitors and reactors, and the neutral point of capacitors of an alternating-current output filter, comprising reactors and the capacitors, to one line in a direct-current circuit. SOLUTION: Star-connected capacitors 2-4 are placed between an alternatingcurrent power supply 1 and reactors 5-7, and the neutral point of the star-connected capacitors 2-4 is connected to the negative side of a capacitor 20. Star-connected capacitors 38-40 are placed between a load device 41 and reactors 35-37, and the neutral point of the star-connected capacitors 38-40 is connected with the negative side of the capacitor 20. This eliminates fluctuation in voltage at each part of converters caused by the carrier frequency component of a rectifier and the carrier frequency component of an inverter, stabilizes the potential to the ground of each part of these converters, and prevents malfunctions of peripherals. COPYRIGHT: (C)1997,JPO

Patent
Kawai Wakahiro1
15 Mar 1996
TL;DR: In this article, a dielectric layer 3 is formed between opposed electrodes 1 and 2, and two layers of conductive particles, 4 and 5, are formed between them.
Abstract: A high-capacitance thin film capacitor is compact and has a low profile. A dielectric layer 3 is formed between opposed electrodes 1 and 2. Between the electrodes and the dielectric layer are two layers of conductive particles, 4 and 5.

Proceedings ArticleDOI
03 Mar 1996
TL;DR: In this paper, the authors present test results on double layer capacitors operating from DC to 50 kHz, along with DC capacitance measurements and implementation in practical power electronic circuits, and compare the performance of these capacitors with conventional DC capacitors in terms of the equivalent series resistance with frequency, duty cycle, polarity, load current, and charging voltage.
Abstract: Advancement of double layer capacitor technology has made commercially available capacitors with capacitance values exceeding 470 Farads. This paper presents test results on double layer capacitors operating from DC to 50 kHz. Equivalent series resistance variation with frequency, duty cycle, polarity, load current, and charging voltage are examined, along with DC capacitance measurements and implementation in practical power electronic circuits.

Journal ArticleDOI
TL;DR: In this paper, the successful fabrication and characterization of PZT thin-film capacitors with transparent conducting indium tin oxide (ITO) contacts using a combination of metallo-organic decomposition (MOD) and rf-sputtering are described.

Proceedings ArticleDOI
23 Sep 1996
TL;DR: In this article, a method for testing patterned metallized film capacitors for DC applications is presented, where individual breakdowns in the capacitor can be detected by observing the leakage current.
Abstract: A method for testing patterned metallized film capacitors for DC applications is presented. Individual breakdowns in the capacitor can be detected by observing the leakage current. Capacitance of the charged capacitor and the amount of energy involved in clearings are obtained.

Proceedings ArticleDOI
20 Oct 1996
TL;DR: In this article, the authors developed and characterized power capacitors as a function of temperature from 20/spl deg/C to -185/spl/C in terms of their dielectric properties.
Abstract: Among the key requirements for advanced electronic systems is the ability to withstand harsh environments while maintaining reliable and efficient operation. Efforts were taken to design and develop power capacitors capable of wide temperature operation. Ceramic and film power capacitors were developed and characterized as a function of temperature from 20/spl deg/C to -185/spl deg/C in terms of their dielectric properties. These properties included capacitance stability and dielectric loss in the frequency range of 50 Hz to 100 kHz. DC leakage current measurements were also performed on the capacitors. The paper presents the results that indicate good operational characteristic behavior and stability of the components tested at low temperatures.

Patent
22 Nov 1996
TL;DR: In this article, a memory cell configuration and a method for its production include stacked capacitors and use a vertical storage capacitor having a ferroelectric or paraelectric storage dielectric.
Abstract: A memory cell configuration and a method for its production include stacked capacitors and use a vertical storage capacitor having a ferroelectric or paraelectric storage dielectric. In order to produce the storage capacitor, a dielectric layer for the storage dielectric is produced over the whole area. The dielectric layer is subsequently structured and first electrodes and second electrodes for the storage capacitors are formed. The invention is suitable for Gbit DRAMs and for nonvolatile memories.

Proceedings ArticleDOI
18 Aug 1996
TL;DR: The properties of MOCVD-grown complex oxide dielectric Ba/sub 1-x/Sr/sub x/TiO/sub 3/ (BST) films have been studied intensively for DRAM applications as discussed by the authors.
Abstract: The complex oxide dielectric Ba/sub 1-x/Sr/sub x/TiO/sub 3/ (BST) has recently been studied intensively for DRAM applications. Another significant nearer term application for which BST may be suited is replacement of discrete capacitors now attached to advanced IC's. Specific devices include bypass, decoupling, and switched filter capacitors, often operated at high frequencies. With current SiO/sub 2/ based dielectrics such integrated capacitors may take up from 20% to 50% of the device area; use of higher dielectric constant BST could reduce this by at least a factor of 10. We will discuss properties of MOCVD-grown BST which relate to these capacitor applications, including second order dielectric nonlinearity and leakage currents at useful device operating voltages (3 V). Dielectric constant, nonlinearity and breakdown voltages are found to have a strong dependence on deposition temperature of BST films, so optimum processing conditions will depend on the end device application.

Proceedings ArticleDOI
06 Oct 1996
TL;DR: In this paper, the critical characteristics of the capacitors utilized in most power electronic applications are discussed and why polypropylene is the dielectric of choice and which winding construction is most appropriate for a specific application.
Abstract: This presentation assists the power electronic designer in selecting the correct plastic film capacitor for a particular application. It reviews the critical characteristics of the capacitors utilized in most power electronic applications. It presents why polypropylene is the dielectric of choice and which winding construction is most appropriate for a specific application. It also provides several termination methods which improve the capacitor's dV/dT, current carrying and reliability parameters.

Journal ArticleDOI
TL;DR: In this article, thin-film decoupling capacitors based on ferroelectric PLZT (PbLaZrTiO{sub 3}) films are developed for advanced packaging.
Abstract: Thin-film decoupling capacitors based on ferroelectric PLZT (PbLaZrTiO{sub 3}) films are being developed for advanced packaging. The increased integration that can be achieved by replacing surface- mount capacitors should lead to decreased package volume and improved high-speed performance. For this application, chemical solution deposition is an appropriate fabrication technique since it is a low- cost, high-throughput process. Relatively thick Pt electrodes (1{mu}m) are used to minimize series resistance and inductance in fabricating these devices. Also, important electrical properties are discussed, with emphasis on lifetime measurements, which suggest that resistance degradation will not be a severe limitation on device performance. Finally, some of the work being done to develop methods of integrating these thin-film capacitors with integrated circuits and multichip modules is presented.

Proceedings ArticleDOI
A.M. Gully1
23 Sep 1996
TL;DR: In this article, all-film capacitors of both dry and oil impregnated types in power electronic equipment have been discussed from the users' viewpoint and the consequential results of failure can be considerable.
Abstract: Experience with all-film capacitors of both dry and oil impregnated types in power electronic equipment has been discussed from the users' viewpoint. The consequential results of failure can be considerable and, although capacitors have proved to be generally reliable devices, the wide variety of failures encountered have often been associated with batch manufacturing problems.

Journal ArticleDOI
TL;DR: In this article, an experimental and theoretical study of high-voltage (0 to 1000 VDC) acceptor-doped barium-titanate BaTiO/sub 3/ ceramic capacitors is presented for several possible uses in integrated power-electronic converters with flat voltage and frequency response up to 1 MHz.
Abstract: High-voltage (1000 V) distributed and lumped ceramic capacitors are under development for diverse applications in integrated power-electronics structures and systems for cost-efficient production. These applications range from systems involving new integrated packaging and manufacturing technologies such as for dc-dc converters, to optimal power-component designs such as in dissipative RCD turn-off snubber circuits for high-power transistor or thyristor switch protection. Their design requires an understanding of the interacting ferroelectric, grain-boundary, and space-charge mechanisms controlling the high-voltage and low-frequency response. This paper relates to an experimental and theoretical study of high-voltage (0 to 1000 VDC) acceptor-doped barium-titanate BaTiO/sub 3/ ceramic capacitors, for several possible uses in integrated power-electronic converters with flat voltage and frequency response up to 1 MHz. The paper includes interpretations, based on experiment, of the inter-dependence of (a) ferroelectric-grain, (b) semiconductor-compensation-insulator-compensation-semiconductor (n-c-i-c-n) grain-boundary, and (c) Debye space-charge contributions to capacitance, as functions of acceptor doping.

Patent
17 Sep 1996
TL;DR: In this paper, the problem of obtaining both a solid electrolytic capacitor and a small-sized film capacitor with high capacitance achieving factor, high capacitor characteristic, and high heat and moisture resistance is addressed.
Abstract: PROBLEM TO BE SOLVED: To obtain easily both a solid electrolytic capacitor and a film capacitor each of which has a high capacitance achieving factor, a high capacitor characteristic, and high heat and moisture resistance. SOLUTION: In a capacitor and its manufacturing method, there are provided a pair of opposite electrodes to each other, a dielectric layer interposed between the electrodes, and a laminated conductive macromolecular layer comprising a first conductive macromolecular layer interposed between the electrodes which contains as its repeated unit a thiophene derivative shown by the chemical formula and a second conductive macromolecular layer which contains as its repeated unit pyrrole or the derivative thereof. As a result, there are obtained easily both a solid electrolytic capacitor and a small-sized film capacitor with a large capacitance each of which has a high capacitance achieving factor, a high capacitor characteristic, and high heat and moisture resistances.

Patent
23 Oct 1996
TL;DR: In this paper, a chip-type composite electronic component is described, where a pair of end electrodes are formed on the insulator substrate and a lower and upper electrode are connected to one of the end electrodes.
Abstract: Disclosed are a thick-film capacitor and a chip-type composite electronic component. A pair of end electrodes are formed on the insulator substrate. A lower electrode is formed on the insulator substrate. A dielectric layer is formed on the lower electrode. An upper electrode formed on the dielectric layer. One of the lower electrode and the upper electrode has a broad-width portion having a width wider than the remaining portion thereof. The one of the lower and upper electrode at the broad-width portion is directly connected to one of the end electrodes. The thick-film capacitor is provided with a capacitor electrode arranged to provide positive connection, even where the width of the capacitor electrode is determined narrow to meet a small capacitance value.