Showing papers on "Photomask published in 2018"

Large-area patterned 2D conjugated microporous polymers via photomask-assisted solid-state photopolymerization

Abstract: The large-area and scalable patterning process of conjugated polymers is a critical step toward their practical applications in organic electronics. Here we report a wafer-scale patterning method for 2D conjugated microporous polymer (CMP) films on arbitrary substrates via photomask-assisted solid-state photopolymerization under ambient conditions. 2D CMP patterns from monomeric carbazole materials were controllably prepared with variable geometries with the geometric photomasks and desired film thicknesses by modulating the polymerization time. Moreover, 2D CMP patterns with various size and shapes can be formed onto a reduced graphene oxide (rGO) substrate to construct 2D CMP/rGO heterostructures. The obtained heterostructure exhibited a p-type behavior compared to the metal-like property of the rGO film. Combining this solid-state photopolymerization with photomask techniques, a patterned 2D organic/inorganic heterostructure with a precise size and shape control could be further realized for other 2D materials and their integrated devices.

Mask-aligner lithography using a continuous-wave diode laser frequency-quadrupled to 193 nm.

Abstract: We present a mask-aligner lithographic system operated with a frequency-quadrupled continuous-wave diode laser emitting at 193 nm. For this purpose, a 772 nm diode laser is amplified by a tapered amplifier in the master-oscillator power-amplifier configuration. The emission wavelength is upconverted twice, using LBO and KBBF nonlinear crystals in second-harmonic generation enhancement cavities. An optical output power of 10 mW is achieved. As uniform exposure field illumination is crucial in mask-aligner lithography, beam shaping is realized with optical elements made from fused silica and CaF2 featuring a diffractive non-imaging homogenizer. A tandem setup of shaped random diffusers, one static and one rotating, is used to control speckle formation. We demonstrate first experimental soft contact and proximity prints for a field size of 1 cm2 with a standard binary photomask and proximity prints with a two-level phase mask, both printed into 120 nm layers of photoresist on unstructured silicon substrates.

EUV photolithography mask inspection using Fourier ptychography

Abstract: Fourier ptychography is a computational imaging techniques that combines various full-field coherent images acquired under varied illumination angles and combined to yield a angular spectrum with a large synthetic numerical aperture and non-interferometric phase information. We present here the implementation of this technique in a full-field soft x-ray microscope designed to emulate modern EUV lithography tools imaging conditions, and we show that this technique can be used for the study of EUV photomasks. The technique allows us to quantitatively characterize phase defects (predominant in EUV lithography), to study new mask designs made of phase structures, to study sub-resolution assist features and extend the resolution of the microscope down to 26-nm, correspond to the N1 technology node.

Mask process correction validation for multi-beam mask lithography

Abstract: Mask Process Correction (MPC) is well established as a necessary step in mask data preparation (MDP) for electron beam mask manufacturing at advanced technology nodes from 14nm and beyond. MPC typically uses an electron scatter model to represent e-beam exposure and a process model to represent develop and etch process effects [1]. The models are used to iteratively simulate the position of layout feature edges and move edge segments to maximize the edge position accuracy of the completed mask. Selective dose assignment can be used in conjunction with edge movement to simultaneously maximize process window and edge position accuracy [2]. MPC methodology for model calibration and layout correction has been developed and optimized for the vector shaped beam (VSB) mask writers that represent the dominant mask lithography technology in use today for advanced mask manufacturing [3]. Multi-beam mask writers (MBMW) have recently been introduced and are now beginning to be used in volume photomask production [4]. These new tools are based on massively parallel raster scan architectures that significantly reduce the dependence of write time on layout complexity and are expected to augment and eventually replace VSB technology for advanced node masks as layout complexity continues to grow [5][6]. While it is expected that existing MPC methods developed for VSB lithography can be easily adapted to MBMW, a rigorous examination of mask error correction for MBMW is necessary to fully confirm applicability of current tools and methods, and to identify any modifications that may be required to achieve the desired CD performance of MBMW. In this paper we will present the results of such a study and confirm the readiness of MPC for multi-beam mask lithography.

Modeling and Simulation

Abstract: CONTENTS 31.1 Introduction into Lithography Simulation 65031.1.1 Aerial and Resist Image Formation 651 31.1.2 Physical/Chemical Modifications during the Processing of thePhotoresist 654 31.1.3 General Simulation Strategies 65531.2 Rigorous Modeling of Light Diffraction from Masks 656 31.2.1 Motivation 656 31.2.2 General Remarks on Rigorous Electromagnetic Field Solvers 658 31.2.3 Finite-Difference Time-Domain Method 66031.2.3.1 A Short History of FDTD 660 31.2.3.2 The FDTD Algorithm 66031.2.4 Coupling with Standard Lithography Simulations and Performance Considerations 66731.2.5 Field Decomposition Techniques and other Enhancements 669 31.3 Application of Simulation to Different Mask Types 67031.3.1 Binary Masks 670 31.3.2 Phase Shift Masks 672 31.3.3 EUV-Masks 67531.3.3.1 Efficient Modeling of EUV-Masks 676 31.3.3.2 Mask-Induced Imaging Artifacts in EUV Lithography 67931.4 Simulation of Mask Defects 681 31.4.1 Standard Defect Printability Considerations 681 31.4.2 Rigorous EMF Simulation of Defects on Optical Masks 683 31.4.3 EUV Multilayer Defects 68531.5 Summary 686 Acknowledgments 687 References 688Modeling and simulation have become indispensable tools for the understanding and optimization of lithographic processes and for the development of new process technology. Aerial image simulation is used to evaluate the imaging of designed photomasks and to explore the impact of optical parameters, such as numerical aperture (NA), partial coherence s, and defocus, and wave aberrations on the imaging performance of a projection stepper or scanner. Other simulation approaches are used to describe theimpact of the photoresist thickness, of the post-exposure bake (PEB) temperature and of the development characteristics of the photoresist on the total process performance. Lithography simulation is also used as an effective learning tool for new process engineers, scientists, and managers.

Process and metrology developments in the production of immersion gratings

Abstract: Silicon immersion gratings take advantage of the high index of refraction of silicon (3.4) to significantly improve the performance and reduce the volume of near-infrared spectrographs. The immersion gratings we discuss here are produced by contact photolithography. Lithography is followed by plasma etching of a silicon nitride hard mask, which defines the pattern for wet etching of the silicon v-grooves in potassium hydroxide that form the blazed grating. We have shown that interference fringes between the photomask and the polished silicon nitride on silicon substrate produce a phase error in the completed grating. With our standard process, the lines in photoresist formed during the lithography step have a slope with an additional “foot” at the base of the line. The thickness of this foot can vary and may be partially etched away causing a shift in the position of the line during etching. To reduce the effect of the foot, we have added a plasma etch step designed to remove the foot prior to completing the silicon nitride etch. We have also found that thinning the photoresist to better control the profile formed during contact printing and subsequent etching results in very uniform gratings over a 125 mm grating length. We will also describe a method to predict the phase uniformity at the patterning stage, which allows us to pattern and evaluate the potential grating before etching, saving both time and material costs.

Mask-aligner Talbot lithography using a 193nm CW light source

Abstract: We present and discuss Talbot mask-aligner lithography, relying on a continuous wave laser emitting at 193nm for the illumination. In this source, a diode laser at 772nm is amplified by a tapered amplifier in master-oscillator power-amplifier configuration and frequency-quadrupled in two subsequent enhancement cavities using lithium triborate and potassium fluoro-beryllo-borate nonlinear crystals to generate the emission at 193 nm. The high coherence and brilliance of such an illumination source is predestined for plane wave mask-aligner illumination, crucial in particular for high-resolution lithographic techniques such as Talbot lithography and phase-shift masks. Talbot lithography takes advantage of the diffraction effect to image periodic mask features via self-replication in multiples of the Talbot distance behind the photomask when exposed by a plane wave. By placing a photoresistcoated wafer in one of the Talbot planes, the mask pattern is replicated in the resist. Periodic patterns with diverse shapes are required for wire grid polarizers, diffraction gratings, and hole arrays in photonic applications as well as for filters and membranes. Using an amplitude mask with periodic structures, we demonstrate here with such a technique sub-micron feature sizes for various designs at a proximity gap of 20 µm.

Manufacturing method of array substrate

Abstract: The invention discloses a manufacturing method of an array substrate. The manufacturing method of an array substrate includes the steps: providing a first substrate; providing a first photomask, and setting an active switch on the first substrate; providing a second photomask, and setting photoresist on the active switch, performing wet etching on the active switch for the first time, performing dry etching on the active switch for the first time, performing wet etching on the active switch for the second time, and performing dry etching on the active switch for the second time, wherein the active switch includes a metal layer, and the etching solution for the metal layer includes phosphoric acid, acetic acid and nitric acid, and the concentration of the nitric acid in the etching solutionis 1.8% to 3.0%; providing a third photomask, and setting a protection layer on the metal; and providing a fourth photomask, and setting a pixel electrode layer on the protection layer. The manufacturing method of an array substrate reduces the concentration of the nitric acid in the etching solution for the metal layer in the etching (2W2D) step, and reduces the edge length of the amorphous silicon layer and the ohmic contact layer in the active switch through regulation and control, so as to reduce the line breaking risk which may occur as the linewidth of the source/drain electrode layer is smaller.

Actinic EUV scatterometry for parametric mask quantification

Abstract: There are many applications where fast, accurate light scattering from EUV photomasks must be computed, including inverse mask design, actinic die-to-database inspection, and actinic scatterometry. However, so-called mask 3D effects make this calculation much more challenging than traditional optical lithography. These 3D effects arise from the optically thicker absorber, the lack of illumination symmetry about normal incidence, the multilayer mirror reflection function, and multiple scattering off the absorber. In this paper, we explore using actinic scatterometry at the CXRO EUV reflectometer to characterize both the multilayer and absorber of an EUV photomask; we then introduce the Multilayer Multiple Scattering (MLMS) mathematical model that conveniently separates the effects of the multilayer and the absorber and explore the implications of this model on the origins of mask 3D effects.

Microscope projection photolithography based on ultraviolet light-emitting diodes

Abstract: We adapted a conventional microscope for projection photolithography using an ultraviolet (UV) light-emitting diode (LED) as a light source. The use of a UV LED provides the microscope projector with several advantages in terms of compactness and cost. The adapted microscope was capable of producing line patterns as wide as 5 μm with the use of a 4X objective lens under optimal lithography conditions. The obtained line width is close to that of the diffraction limit, implying that the line width can be reduced further with the use of a higher resolution photomask and higher magnification objective lens. Finally, we showed how the single slit fabricated by microscope projection photolithography was used for a diffraction experiment. We expect that low-cost microscope projection photolithography based on a UV LED will contribute to the field of physics education or various areas of research, such as chemistry and biology, in the future.

Pellicle for photomask and exposure apparatus including the pellicle

Abstract: Provided are a pellicle for a photomask, which protects the photomask from external contamination and an exposure apparatus including the pellicle for the photomask. The pellicle for the photomask includes a pellicle membrane provided spaced apart from the photomask. The pellicle membrane includes a semiconductor having a two-dimensional (2D) crystalline structure.

Tools for Mask Image Evaluation

Abstract: CONTENTS 29.1 Introduction 60729.1.1 Reticle Enhancement Techniques 608 29.1.2 Further Need for Mask Quality Assurance 60929.2 Aerial Image Measurement Technique 609 29.3 Aerial Image Analysis 612 29.4 Typical Applications for AIMSy 61529.4.1 Defect Analysis 615 29.4.2 Pre-and Postrepair Qualification 616 29.4.3 AIMSy as ‘‘Phase Indicator’’ 619 29.4.4 Process Optimization Based on Aerial Images 622 29.4.5 New Applications in the Extreme Ultraviolet Arena 625 29.4.6 AIMSy in IC Manufacturing 62529.5 Summary 625 Acknowledgments 626 References 626The rapid growth of the semiconductor industry occurred as a result of patterning more and more devices on smaller areas and thereby increasing the density of the integrated circuits (ICs). As this affects all the manufacturing steps, a strong challenge was placed on the micro-lithography, which allows the fabrication of these silicon chips layer by layer using various templates, or photomasks. These are durable, high-precision plates, which contain the microscopic image of each layer of an IC. In the past, photomasks were simply binary made out of patterns of chrome-on-glass substrate. Exposure tools, both wafer steppers and scanners, are critical to transfer the two-dimensional patterns of various photomasks or reticles repeatedly onto photosensitive resist, which is spun onto the wafer to create the structures layer by layer in several process steps, known as pattern transfer. On the wafer the patterns are reduced in size compared to the mask, typically a 4:1 reduction. The photomask image to be printed on the wafer is known as the aerial image. As technology has advanced, so smaller and smaller sizes of aerial images have to be printed on the resist of the wafer. Dense lines and spaces or contact holes are permanently shrinking as we head to the next generation technology node.

Photomask manufacturability and pattern fidelity for curvilinear structures

Abstract: Microfabrication techniques, used widely for the construction of integrated circuits, are being used in an increasing variety of non-IC applications requiring features with curved shapes, such as the construction of photonics and microelectromechanical devices. Maintaining the fidelity of curved edges through the photomask fabrication process with tools originally designed to generate shapes with straight edges presents maskmakers with challenging issues of manufacturability and pattern fidelity. This paper will present and discuss various issues on the topic of photomask manufacturability for curvilinear structures; with recommendations for the design and layout of these structures to support photomask manufacturability while maintaining pattern fidelity.

Conductive and transparent submicron polymer lens array fabrication for electrowetting applications

Abstract: In this study, we have demonstrated a simple and inexpensive process to fabricate electrowetting lens arrays with various curvatures (micron to submicron) on conductive and transparent polydimethylsiloxane (PDMS) molds without additional metal layers. The microlens arrays were fabricated using one-step dual diffuser lithography process, which utilizes a pair of diffusers to diffract the incident rays of UV light at wide angles before approaching the photoresist. Dimensional control and high fill factor was achieved by just varying the exposure energy and gap between the patterns in the photomask, respectively. The patterns were replicated in conductive and transparent Ag(n)-PDMS (5–20% Ag) with 15 μm thickness. High conductivity of 4.6 × 10−1 S/m and high transmission efficiency of 90% was demonstrated by Ag(n)-PDMS molds. Micro-nanolens arrays fabricated by the optimized corelation were utilized to demonstrate switchable wettability behavior of water droplet at different applied voltages. The ele...

Simulating near field image in optical lithography

Abstract: A method and an apparatus for determining near field images for optical lithography include receiving a thin mask image indicative of a photomask feature, in which the thin mask image is determined without considering a mask topography effect associated with the photomask feature, and determining a near field image from the thin mask image by a processor using an artificial neural network (ANN), in which the ANN uses the thin mask image as input. The apparatus includes a processor and a memory coupled to the processor. The memory configured to store instructions executed by the processor to perform the method.

Substrate peeling method and preparation method of OLED (Organic Light Emitting Diode) illumination device

Abstract: The invention provides a substrate peeling method and a preparation method of an OLED (Organic Light Emitting Diode) illumination device. The substrate peeling method comprises the following steps: providing a shading photomask; forming a light-permeating pattern on the shading photomask; performing laser firing of the part of the substrate corresponding to the light-permeating pattern by using the shading photomask, thus separating the part of the substrate corresponding to the light-permeating pattern from a glass carrier plate; and cutting the part of the substrate corresponding to the light-permeating pattern, and peeling the part from the glass carrier plate, to form a hollow pattern of the substrate. The substrate peeling method provided by the invention can be used for implementingpatterned preparation of a substrate.

Microfluidics: The future of testing?

Abstract: The past few decades have seen a promising trend in point-of-care diagnostics, with microfluidic technologies at the cornerstone of this emerging field Microfluidic devices are platforms the size of a microscope slide, or smaller, that are comprised of various circuits connected by miniature tubing systems These technologies can be coupled to many common analytical detection techniques and promise rapid simultaneous analyses and automatic reporting, while utilizing minute volumes of samples and reagents (1) Microfluidic chips are typically made out of a transparent polymer, polydimethylsiloxane, through a process called photolithography A silicon plate is covered with a printed “photomask” With exposure to UV light, the pattern on the photomask is transferred to a light-sensitive chemical “photoresist” on the silicon substrate The photoresist resists subsequent …

Photomask cleaning processes

Abstract: Methods of cleaning a photomask may include heating residual coupling material on a surface of the photomask. The photomask may be characterized by active regions and edge regions. The residual coupling material may be located on portions of the edge regions of the photomask. The methods may include applying an etchant to the residual coupling material. The methods may also include rinsing the etchant from the photomask. A portion of the active regions of the photomask may be maintained substantially free of the etchant during the method.

A comparative study of EUV absorber materials using lensless actinic imaging of EUV photomasks

Abstract: For EUV photomasks, high-k absorber materials represent a potential strategy to effectively mitigate mask 3D effects which are getting more prominent as the scanners’ NA increases. The performance of RESCAN, our actinic lensless imaging microscope is evaluated through three different absorber materials (HSQ, TaBN, and Ni) together with the imaging properties of the materials themselves. Defect maps for each material are analyzed and compared.

Manufacturing method of flash memory

Abstract: The invention discloses a manufacturing method of a flash memory. The manufacturing method comprises the steps of completing manufacturing of a gate structure and a source region of a flash memory unit; forming first side walls on the two sides of polysilicon lines by a growth and complete etching process; enabling a fourth nitride layer to be grown and fully filling the spacing between the firstsides of two polysilicon lines; performing photoetching to protect the fourth nitride layer on the top of the source region, and then performing etching on the fourth nitride layer to form second sidewalls on the second sides of the polysilicon lines; performing first time of source drain injection to form a drain region of the flash memory unit; performing deposition of a fifth silicon oxide layer, performing photoetching definition by adopting a photomask in the source region, and performing etching on the fifth silicon oxide layer; performing photoetching definition by adopting a photomaskin the source region and removing the fourth nitride layer from the top of the source region; meanwhile, forming metal silicide on the surfaces of the source region and the drain region on the two sides of the polysilicon lines; forming an interlayer film; and forming contact holes, and a front surface metal surface, and performing patterning on the front surface metal layer. By virtue of the manufacturing method, the contact resistance of the source region is lowered, and programming efficiency is improved.

Methods for defect inspection, sorting, and manufacturing photomask blank

Abstract: A photomask blank having a thin film on a transparent substrate is inspected for defects by irradiating inspection light to a surface region of the blank, collecting the reflected light from the irradiated region via an inspection optical system to form a magnified image of the region, extracting a feature parameter of light intensity distribution from the magnified image, and identifying the bump/pit shape of the defect based on the feature parameter combined with the structure of the thin film. The defect inspection method is effective for discriminating defects of bump or pit shape in a highly reliable manner. On application of the defect inspection method, photomask blanks having no pinhole defects are available at lower costs and higher yields.

Multi-stage contact and manufacturing method of three-dimensional memory array

Abstract: The invention provides a multi-stage contact and manufacturing method of a three-dimensional memory array. Through structural adjustment, preparation of a contact structure can be realized through a 3D NAND technology by only one layer of photomask; a stop layer for selection ratio transition is placed above a stepped silicon/substrate structure; in an etching procedure, an etching process with high selection ratio is adopted firstly to enable a contact channel to stop at the stop layer; next, an etching process with reverse selection ratio is adopted to remove the stop layer; and finally, thecontact channel above the stepped silicon/substrate can be opened uniformly. By adoption of the process provided by the invention, conditions of insufficient or excessive etching in the etching process by adopting one layer of photomask in the prior art can be avoided; and by adoption of the novel process, cost can be lowered, process complexity is lowered and the process widow is enlarged.

Demonstration of an effective mask proximity correction for advanced photomask

Abstract: The specifications performance data for the latest generation system are compared to prior generations. These results are shown for both missing pattern (or hard) and unknown contamination (or soft) defects of various classifications in different patterns. For hard defects, capability will be demonstrated down to the 65 nm node, with soft defect repair and clean significantly exceeding to even smaller nodes down to 14 nm. The latter is of particular note, especially in the application of the cleaning of fall-on unknown contaminates on pelliclized photomasks. Finally, there will be a discussion of future work to further develop soft repair/clean process and laser processes for other mask technologies.

Ion beam processing for critical EUV photomask process steps: mask blank deposition and photomask absorber etch

Abstract: Development progress and roadmap, for high-reflective Mo/Si multilayers for EUV mask-blanks, are reviewed. We outline the state-of-the-art in low-defect-density secondary ion beam deposition (IBD), and ongoing hardware development for performance improvement and high-volume manufacturing. We further discuss extension of ion beam technology to later steps in the EUV mask manufacturing: deposition of highly-uniform 2.5 – 3nm Ru capping layers; and patterning of novel Ni absorber structures. IBD-deposited Ru films are demonstrated with uniformity of 0.7% 3σ over a 188mm diameter area. By x-ray reflection with Cu Kα radiation, we measure a film density of 12.4 g/cm3, and a roughness of less than 1.0nm. Deposition rates of ~ 1 – 7 nm/min are demonstrated, implying a capping layer deposition time of 20 seconds – 3 minutes. . For advanced absorber patterning, we discuss Argon ion beam etch (IBE) of Ni films. Ni and Ru IBE etch rates of ~ 8 – 80 nm/min are demonstrated, implying absorber etch times of ~ 30 seconds – 5 minutes. IBE Ni:Ru etch selectivity is 1:1 to 1.3:1, so Ru is not a ‘stopping layer’, etch depth must be controlled by time, and Ni uniformity is a requirement. IBE Ni:Photoresist etch selectivity is 0.8:1 to 1.6:1. We simulate the IBE absorber pattern definition for mask features of half-pitch 96nm (24nm at wafer level). Ion beam incidence angle can be optimized to maintain critical dimension within 6% of the pre-etch value.

Microscope Projection Photolithography Based on Ultraviolet Light-emitting Diodes

Abstract: We adapted a conventional microscope for projection photolithography using an ultraviolet (UV) light-emitting diode (LED) as a light source. The use of a UV LED provides the microscope projector with several advantages in terms of compactness and cost. The adapted microscope was capable of producing line patterns as wide as 5 um with the use of a 4X objective lens under optimal lithography conditions. The obtained line width is close to that of the diffraction limit, implying that the line width can be reduced further with the use of a higher resolution photomask and higher magnification objective lens. We expect that low-cost microscope projection photolithography based on a UV LED contribute to the field of physics education or various areas of research, such as chemistry and biology, in the future.

A semiconductor device and a manufacturing method thereof

Abstract: The present invention provides a semiconductor device and a manufacturing method thereof. After forming channel holes and memory structures in channel holes in a stack layer, a step structure is formed, and then pseudo vias and gate line gaps in the step structure are simultaneously formed through the same photomask. Thus, since the step is formed after the channel hole and the storage structure therein are formed, The step structure is not affected by the manufacturing process of the channel hole and the memory structure, the step process is optimized, the device performance is ensured, and the pseudo through hole and the gate line gap in the step structure are simultaneously formed by the same photomask, so that the design of the photomask and the process steps of deep groove etching arereduced, and the manufacturing cost is also reduced.

LTPS (Low Temperature Poly-Silicon) TFT (Thin Film Transistor) substrate manufacturing method

Abstract: The invention provides a LTPS (Low Temperature Poly-Silicon) TFT (Thin Film Transistor) substrate manufacturing method. through carrying out twice etching on a gate metal layer, a self-alignment modeis adopted to complete heavy ion doping and light ion doping on a poly-silicon active layer, LDD structures of the poly-silicon active layer can thus be symmetrically distributed at two sides of the gate, the device characteristics can be improved, and in comparison with the traditional technology, the operation is more stable and reliable, the process photomask number can be reduced, the photomask cost, the operation cost, the material cost and the time cost can be saved, and further through a gate insulation layer thinning process, the thickness of a gate insulation layer correspondingly above the heavily-doped area of the poly-silicon active layer is thinned, and the ion implantation efficiency can be effectively improved.

Advanced Tape Expansion/Assembly Technology for FOWLP and Micro-LED Display

Abstract: This paper describes advanced assembly technologies based on a new tape expansion technique with a selective UV irradiation method for the application of FOWLP (Fan-Out Wafer-Level Packaging) with millimeter-scale dies and micro-LED display with several tens of micrometer-scaled dielets. The assembly technologies allow us to uniformly expand expansion tapes in all direction and array the dies/dielets at the regular pitches desired for their products. We demonstrate the uniform expansion of an expansion tape with 3-mm-square Si dies and 50-μm-square Si dielets using selectively irradiated UV light through a photomask.