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Showing papers on "Power module published in 2021"


Journal ArticleDOI
TL;DR: In this article, a high-voltage dc and pulsewidth modulation (PWM) excitations between different terminals during different switching intervals are investigated. And the authors provide a group of PDIV comparisons of packaging insulation under dc and PWM waveforms and discloses discrepancies in these PDIV results with respect to their excitations.
Abstract: Emerging applications of compact high-voltage SiC modules pose strong challenges in the module package insulation design. Such SiC module insulations are subjected to both high-voltage dc and pulsewidth modulation (PWM) excitations between different terminals during different switching intervals. High dV/dt strongly interferes with partial discharge (PD) testing as it is hard to distinguish PD pulses and PWM excitation-induced interferences. This article covers both the testing and modeling of PD phenomena in the high-voltage power modules. A high dV/dt PD testing platform is proposed, which involves a super-high-frequency (SHF) (SHF >3 GHz) down-mixing PD detection receiver and a high-voltage scalable square wave generator. The proposed method captures SHF PD signatures and determines PD inception voltage (PDIV) for packaging insulation. Using this platform, this article provides a group of PDIV comparisons of packaging insulation under dc and PWM waveforms and discloses discrepancies in these PDIV results with respect to their excitations. Based on these PD testing results, the article further provides a model using the space-charge accumulation to explain the PD difference under dc and PWM waveforms. Both simulation and sample testing results are included in this article to support this hypothesis. With this new model, the article includes an updated insulation design procedure for the high-voltage power modules.

54 citations


Journal ArticleDOI
Chao Ding1, Heziqi Liu1, Khai D. T. Ngo1, Rolando Burgos1, Guo-Quan Lu1 
TL;DR: In this paper, a porous interposer made of low-temperature sintered silver is introduced to reduce the thermomechanical stresses in the power module and a double-side cooled half-bridge module consisting of two 1200 V, 149 A SiC MOSFETs was designed, fabricated, and characterized.
Abstract: Planar, double-side cooled power modules are emerging in electric-drive inverters because of their low profile, better heat extraction, and lower package parasitic inductances However, there is still a concern about their reliability due to the rigid interconnection between the device chips and two substrates of the power module In this article, a porous interposer made of low-temperature sintered silver is introduced to reduce the thermomechanical stresses in the module A double-side cooled half-bridge module consisting of two 1200 V, 149 A SiC MOSFETs was designed, fabricated, and characterized By using the sintered-Ag instead of solid copper interposers, our simulation results showed that, at a total power loss of 200 W, the thermomechanical stress at the most vulnerable interfaces (interposer-attach layer) was reduced by 42% and in the SiC MOSFET by 50% with a tradeoff of only 36% increase in junction temperature The sintered-Ag interposers were readily fabricated into the desired dimensions without postmachining and did not require any surface finishing for die bonding and substrate interconnection by silver sintering The porous interposers were also deformable under a low force or pressure, which helped to accommodate chip thickness and/or substrate-to-substrate gap variations in the planar module structure, thus simplifying module fabrication The experimental results on the electrical performance of the fabricated SiC modules validated the success of using the porous silver interposers for fabricating planar, double-side cooled power modules

38 citations


Journal ArticleDOI
TL;DR: With recent advances in wide-bandgap (WBG) power semiconductor devices, namely, SiC and GaN, the integration of magnetic components with embedded windings in the PCB is feasible for a wide range of applications.
Abstract: In today’s market, quality and reliability in power electronics products are a given Greater emphases are placed on high efficiency, high power density, and low cost Most products are custom designed with significant non-recurrent engineering and manufacturing processes that are labor intensive In certain isolated areas, we have witnessed improvements by integrating power devices, drivers, sensing and control, in the forms of standard power modules, such as the “Intelligent Power Module” (IPM) in small motor drives and “DrMOS” in power supplies for point-of load applications The major road blocks for wide spread applications using these more integrated solutions hinge on the ability to integrate large and bulky passive components with power semiconductors in a form suitable for automation Suffice it to say that the design practice for magnetic components has remained largely the same for the past five decades With recent advances in wide-band-gap (WBG) power semiconductor devices, namely, SiC and GaN, we have witnessed significant improvements in efficiency and power density, compared to the current practice using silicon counterparts Furthermore, with significant higher operating frequency, the integration of magnetic components with embedded windings in the PCB is feasible for a wide range of applications Design trade-offs, previously considered neither practical nor conceivable, can be realized, not only with significant gain in efficiency and power density, but also with drastic improvements of EMI/EMC and manufacturability Several examples are given to illustrate the new design paradigm

36 citations


Journal ArticleDOI
TL;DR: The proposed TL-DCSST adopts the low-voltage insulated-gate bipolar transistor (IGBTs) with excellent switching characteristics to build medium voltage PM and reduces the number of medium frequency transformer (MFT).
Abstract: This article presents a dc solid state transformer based on three-level power module (PM) (TL-DCSST) for interconnection of medium-voltage dc (MVdc) and low-voltage dc distribution system. The proposed TL-DCSST adopts the low-voltage insulated-gate bipolar transistor (IGBTs) with excellent switching characteristics to build medium voltage PM and reduces the number of medium frequency transformer (MFT). This topology features inherent antibias mechanism for MFTs on the primary side, which saves the resonant capacitor at primary side. Meanwhile, the active front end is integrated to realize voltage and power regulation, low voltage ride-through and DC fault handling for MVdc side. In this article, the topology, operation principle, interleaving modulation, circuit parameter design, and control schemes are presented and analyzed comprehensively. At last, a prototype rated at 7 kW has been built and tested, and the experimental results verify effectiveness of the proposed TL-DCSST.

35 citations


Proceedings ArticleDOI
14 Jun 2021
TL;DR: In this paper, a widebandgap (WBG)-based LLC converter is demonstrated to have greatly improved efficiency and power density, operating at 500KHz switching frequency, the circuit topology and design practice is a significant departure from the current practice, a complicated transformer structure is broken down into a structure of three simple transformers that can be easily implemented using a form of four-layer printed circuit board (PCB).
Abstract: The new generation of processors for CPUs, GPUs and AI demand a significantly higher current level of 500A-1000 amperes. To accommodate this significant increase in power demand, the data center server rack must employ a 48V backplane power bus to deliver 25-30KW to its server processor. A state-of-the-art silicon-based power module is demonstrated to offer 96% efficiency and a power density of around 40-50W/in3. In this paper, a wide-bandgap (WBG)-based LLC converter is demonstrated to have greatly improved efficiency and power density. Operating at 500KHz switching frequency, the circuit topology and design practice is a significant departure from the current practice. For example, a complicated transformer structure is broken down into a structure of three simple transformers that can be easily implemented using a form of four-layer printed-circuit-board (PCB). Furthermore, these magnetic components are integrated into a compact structure that is easily manufacturable. By adding two additional shielding layers into the four-layer PCB, a 20db reduction in common-mode noises is realized over the entire frequency spectrum of interest, from 150 KHz up to 30 MHz. Two prototypes of 3kW, 48V DC/DC converters are demonstrated with a peak efficiency of 99% and a power density of 530 W/in3 (33 kW/L).

34 citations


Journal ArticleDOI
TL;DR: In this paper, the effects of using a cooling fluid (H2O) with the presence of carbon nanotubes (MWCNTs) and micro-sprays aimed at reducing the heat peak of the interior of the electrical system, i.e., enhancing the shelf life of components, were evaluated under steady-state conditions and employing the k-omega (k- ω ) turbulence modeling ANSYS-FLUENT software.

33 citations


Journal ArticleDOI
TL;DR: In this article, a multilevel low-inductance SiC power module was designed to optimize a three-phase 540V/15kVA inverter for modern aircrafts.
Abstract: Future aircrafts will be composed of high number of power converters having always higher power density and efficiency. In order to increase performance of such converters, a good option is the use of silicon carbide (SiC) transistors. Although these components reduce losses when compared to their silicon-based counterpart, they increase switching speed and overshoot during commutation, which can cause serious electromagnetic interference issues and overvoltages on loads connected to these converters. For that reason, power modules containing SiC transistors must have the lowest possible parasitic inductance. This article presents a multilevel low-inductance SiC power module designed to optimize a three-phase 540 V/15 kVA inverter for modern aircrafts. Precise dynamic characterization is performed in order to accurately determine switching energies and to show improvement of loss performance of this power module when compared to discrete components and also to power modules from the market. Inverter input and output common mode current reduction due to integrated common mode capacitors in the power module is experimentally shown.

30 citations


Journal ArticleDOI
TL;DR: In this article, a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite embeddings) was proposed for widebandgap power modules.
Abstract: Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. This article presents a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

29 citations


Journal ArticleDOI
TL;DR: A three-dimensional compact thermal network model that considers the thermal boundary conditions and can be obtained by the finite-element method (FEM), and a novel two-step method for thermal parameter extraction is presented.
Abstract: With the development of power electronics technology, power modules delivery considerably greater power density, which makes junction temperature an important parameter for reliable operation. Existing thermal models often ignore the influence of the thermal boundary conditions on the thermal parameter and cannot accurately predict junction temperature in various operating conditions. This article proposes a three-dimensional compact thermal network model that considers the thermal boundary conditions and can be obtained by the finite-element method (FEM). A novel two-step method for thermal parameter extraction is presented and the effects of boundary conditions on thermal network parameters are discussed in detail. The experimental results and FEM simulation show that the proposed thermal network model can accurately estimate the junction temperature in different thermal boundary conditions.

28 citations


Journal ArticleDOI
TL;DR: In this article, the authors present a methodological overview that provides insight to how different technologies may contribute to next generation thermal monitoring solutions, and discuss key challenges that must be addressed such that minimally invasive temperature sensing and thermal monitoring become an industrial practice in the future of power electronics.
Abstract: The increasing demand for higher power device utilization and reliability in power electronic systems is driving the integration of condition monitoring and active control in power electronic systems. With thermal heat dissipation being the limiting factor of module lifetime and performance, thermal real-time monitoring is key in this transition. However, this requires the availability of highly accurate and high-bandwidth temperature information with minimal phase lag. This paper reviews key methods for temperature extraction in power modules: temperature sensing, thermal estimators and thermal observers. While previous research has examined individual techniques of these methods in great detail, this paper presents a methodological overview that provides insight to how different technologies may contribute to next generation thermal monitoring solutions. In this context, the paper discusses how different technologies can be effectively combined to improve their overall performance. It finally discusses key challenges that must be addressed such that minimally invasive temperature sensing and thermal monitoring become an industrial practice in the future of power electronics.

26 citations


Journal ArticleDOI
TL;DR: The interdependency of the power modules to each other in a multiphase system and the impact of thePower module layout on the busbar and system design are investigated using ANSYS Q3D to elaborate the effectiveness of the proposed power module design methodology.
Abstract: The architectural design of a power module determines its application. And the efficacy of a power module layout appears in the system performance by assisting low-inductive busbar design. In this article, some of the previously proposed power modules are reviewed and analyzed considering their system-level applications and their impacts on the architectural design approach. A codesign methodology is then described that accounts for power module system compatibility. The resultant module designs improve the performance of widebandgap (WBG) power semiconductor devices with respect to their interaction with the rest of the power electronics system, such as gate drivers and dc-link capacitor bank. A few common power modules are categorized by architecture and layout; the interdependency of the power modules to each other in a multiphase system and the impact of the power module layout on the busbar and system design are investigated using ANSYS Q3D to elaborate the effectiveness of the proposed power module design methodology.

Journal ArticleDOI
TL;DR: In this article, a finite element analysis (FEA) is performed to obtain the thermomechanical stress distribution around the defects, which is combined with the solder material's property to give a lifetime model.
Abstract: In renewable energy and grid applications, solder-attached power modules are subject to fatigue stress cycles of low amplitudes, but the devices will be in service for decades. This article aims to understand the slow aging process by focusing on the initial defects and their growth under the stress cycles of concern. A finite-element analysis (FEA) is performed to obtain the thermomechanical stress distribution around the defects, which is combined with the solder material’s property to give a lifetime model. Effort is made to validate the model by power cycling plus microscale computed tomography (CT) scanning. It is found that a void in the solder layer may first transform into a crack on the material boundary, which then grows progressively more rapidly until device failure. A numerical example is shown for evaluating the lifetime of an IGBT power module in a “soft-open-point” (SOP) converter designed for an 11-kV power network.

Journal ArticleDOI
01 Jun 2021
TL;DR: This article clearly demonstrates that it is now possible to achieve a compact, high-power, isolated dc–dc converters using 3.3-kV SiC-MOSFET power modules with high efficiency.
Abstract: Today, in electric railways, the old dc supply systems are reaching their limits. To improve their efficiency and increase railroad traffic, a new dc electrification has recently been proposed at 9 kV. It is now necessary to prepare the migration of infrastructure and rolling stock, using power electronic transformers (PETs), for adaptation to this voltage level. For this application, high efficiency and reduced volume are essential. This article clearly demonstrates that it is now possible to achieve a compact, high-power, isolated dc–dc converters using 3.3-kV SiC-MOSFET power modules with high efficiency. After a preliminary study based on simulations, this article focuses on the characterization and implementation of elementary isolated dc–dc converters. The proposed topology is a series-resonant converter rated for a nominal power of 300 kW at 1.8 kV. First, laboratory testing using an “opposition method” is used to evaluate the elementary converters up to their nominal power using both electrical and thermal measurements to accurately determine losses and efficiency. At the nominal output power, an efficiency of 98.93% is obtained. This is quite remarkable for an isolated dc–dc converter operating under 1.8 kV with a switching frequency of 15 kHz. Finally, two elementary isolated dc/dc converters are associated with input series/output parallel (ISOP) configuration in order to achieve a 3-kV/1.5-kV PET with a nominal power of 600 kW as a prelude to the final 9-/1.5-kV power conversion.

Journal ArticleDOI
TL;DR: In this article, an electrophoresis process is used to build advanced functionally graded materials (FGM) based on polymer/ceramic (epoxy/SrTiO 3 ) composites for field grading in power electronics.
Abstract: A series of three articles presents an innovative way to build advanced functionally graded materials (FGM) based on polymer/ceramic (epoxy/SrTiO 3 ) composites tailored by electrophoresis for field grading in power electronics. In Part 3, this method is applied in the context of power modules for DBC substrate encapsulation. An evaluation of the FGM performances is reported based on electrostatic simulations and breakdown voltage measurements on encapsulated DBC substrates. The results show a significant mitigation of the electric fringe field at the triple point while breakdown is largely increased by a factor 2 for FGM composites compared to neat epoxy. The process enables the use of electric field reinforcements of HV electrical systems (e.g. tips coming from the design), and thus potential weak points, to locally ‘self-heal’ them in-situ. Such an electrophoresis process used to build FGM composites paves the way for the next generation of functionalized polymer composites used in high voltage power applications for improving the electrical aging of insulating materials and power system reliability.

Journal ArticleDOI
TL;DR: A gate driver IC for E-mode GaN power transistors with 7 segmented output stages with simplified programming method for the dynamic gate driving pattern is presented and the optimal gate drive pattern can be defined by simply adjusting one external bias resistor.
Abstract: Conventional di/dt and dv / dt control and gate protection techniques for gallium nitride (GaN) power transistors usually employ external controllers, isolation circuits, discrete pull-up, and pull-down resistors. With large number of components, power modules become more complex and may introduce additional parasitic. Gate driver ICs with segmented output stages and dynamic gate driving have been reported previously to be effective in simultaneously suppressing gate ringing and overshoot voltage while maintaining fast switching speed. However, the programming for dynamic gate driving is rather complicated, requiring the user to load a sequence of driving patterns obtained from trial and error ahead of time. This article presents a gate driver IC for E-mode GaN power transistors with seven segmented output stages. More importantly, it offers a simplified programming method for the dynamic gate driving pattern. The optimal gate drive pattern can be defined by simply adjusting one external bias resistor. The proposed method eliminates the complex trial and error digital control, and can potentially promoting the wider acceptance of dynamic gate driving by the industry. The timing resolution for the gate drive pattern can be varied in steps from 0.5 to 5 ns. It can also be used to drive many commercially available GaN power transistors.

Journal ArticleDOI
TL;DR: In this article, a localized direct phase-change cooling strategy is applied and integrated with direct bonded copper in IGBT power module, which provides a new perspective in the compact and efficient design of power electric modules.
Abstract: In electric vehicles and hybrid electric vehicles, insulated-gate bipolar transistor (IGBT) power module trends to dissipate higher heat flux due to increased power rating and reduced package size. An inefficient cooling method will result in stringent thermal reliability problems. Therefore, there is a strong need for innovative and efficient cooling technologies in order to tackle these issues. In this article, a localized direct phase-change cooling strategy is applied and integrated with direct bonded copper in IGBT power module. Vapor chamber with light weight, high thermal conductivity, and even temperature uniformity replaces original copper baseplate. Layers of thermal grease and original cooling plate are removed, leading to a further reduction in thermal resistance. In order to evaluate the new module, a thermal model and an experiment were built to analyze temperature distribution in layers, junction temperature, temperature uniformity, and thermal resistance. Results indicate the integrated thermal management system outperforms traditional cooling solutions on the cooling capacity. Improvements on junction temperature, temperature uniformity, and total thermal resistance are 34.6%, 76.6%, and 41.6%, respectively. The results illustrate the potential of phase-change cooling by vapor chamber. It provides a new perspective in the compact and efficient design of power electric modules.


Journal ArticleDOI
TL;DR: In this paper, the authors developed an inductance model that includes the parasitic mutual inductance between parallel current path segments for SiC multichip power modules and improved the package layout based on the transient analysis.
Abstract: This article first developed an inductance model that includes the parasitic mutual inductance between parallel current path segments for SiC multichip power modules. Based on the developed model, the SiC multichip module's transient response was analyzed, important parasitic inductances were identified. The layout was improved based on the transient analysis. The improved package layout can reduce the parasitic inductance without increasing the fabrication difficulty. Experiments were conducted to validate the reduction of parasitic inductances. The parasitic ringing and the crosstalk effect were significantly reduced with the proposed technique. The thermal performance was also improved with the proposed layout.

Journal ArticleDOI
TL;DR: In this article, a low-profile and high power density packaging solution of a SiC power module with enhanced electrical and thermal performance is presented, where the design optimizations on layout, chip placement, and terminal structure are compatible with the conventional module fabrication processes.
Abstract: Silicon carbide (SiC) power devices possess many beneficial properties for power electronics applications, but commercial 62-mm SiC power module packages with the direct drop-in replacement of Si devices limit many benefits of these SiC power devices. To fully utilize the advantages of the SiC power devices, this article presents a low-profile and high power density packaging solution of a 62-mm 1200-V/300-A SiC power module with enhanced electrical and thermal performance. The design optimizations on layout, chip placement, and terminal structure are compatible with the conventional module fabrication processes. An increase of power density by threefold is achieved with a low-profile package by reducing the height of the terminal connectors. Moreover, lower voltage overshoots of gate–source and drain–source of the proposed module are demonstrated due to low inductance in both gate and power loops. Thermal simulations show that the proposed module has a lower peak junction temperature and a more balanced temperature distribution among paralleled devices. Finally, the commercial and fabricated modules are characterized experimentally under the same conditions. Both simulation and experimental results show that the gate and power loop inductances of the proposed module are reduced by 96% and 76%, respectively. Moreover, the total switching loss and drain–source voltage overshoot are reduced by 44% and 54%, respectively, at 300 A using a 2- $\Omega $ external gate resistor.

Journal ArticleDOI
TL;DR: In this paper, an n-doped 4H SiC thermal engineering group (TEG) chip was used to evaluate the thermal properties of a power module structure by Ag sinter joining with micron/submicron Ag particles paste in low temperature, low pressure, and cooling system by thermal interface material bonding.
Abstract: Despite the rapid progression of silicon carbide (SiC) power devices, the thermal characteristic evaluation during power cycling at high temperature (>200 °C) is an issue. In this article, a fast and miniaturized evaluation system with online thermal characteristic measurement function was introduced by an n-doped 4H SiC thermal engineering group (TEG) chip. Online thermal resistance measurement of a power module structure by Ag sinter joining with micron/submicron Ag particles paste in low temperature, low pressure, and cooling system by a thermal interface material bonding was performed. High-temperature reliability was systemically investigated by power cycling tests by switching on / off the power source which is connected to the SiC-TEG chip by Au wires. The total thermal resistance of the power module from the SiC-TEG chip to the cooling system increased from 0.5 to 0.53 K/W with the enhanced power source, and remained almost same after 20 000 power cycling at a swing temperature ΔTj of 150 °C. Furthermore, the SiC-TEG power module structure with the die attached with Pb and Pb-free solders, alongwith the same power source as sinter Ag paste was also measured. The Ag sinter joint possesses the lowest thermal resistance and highest high temperature reliability during power cycling compared with Pb and Pb-free die-attach materials.

Journal ArticleDOI
TL;DR: In this paper, a simple, fast, and cost-effective dynamic voltage balancing circuit of the series-connected SiC MOSFETs is proposed to suppress the voltage imbalance among the devices.
Abstract: Series connection of SiC power MOSFET is an attractive approach to expand the blocking voltage of SiC devices, whereas the dynamic voltage balancing among the series-connected devices is the most critical challenge of the technique. In this article, a simple, fast, and cost-effective dynamic voltage balancing circuit of the series-connected SiC MOSFETs is proposed to suppress the voltage imbalance among the devices. The proposed circuit is composed of a resistor-capacitor (RC) snubber with a coupled inductor to effectively sense the voltage imbalance and add a compensated signal to the gate driving voltage. In the article, the operation principle of the proposed method is described in detail and the parameter selection of the circuit is given. Then the optimized layout of the circuit in a typical half-bridge SiC power module is proposed to reduce the stray parameters introduced by the coupled inductor effectively. The proposed method is verified by experiments under different conditions. Compared with a purely RC snubber balancing strategy, the capacitor can be significantly reduced. Since only passive components are required in the feedback loop, the proposed method demonstrates a reliable and straightforward approach to achieve equal voltage sharing of the series-connected devices.

Journal ArticleDOI
TL;DR: Results clearly show that the proposed power management strategies enables power sources operating in their nominal area, extending their lifetimes, and inducing 3% minimization in hydrogen consumption, enabling the drone endurance as much as the carried fuel amount.

Journal ArticleDOI
TL;DR: A constraint-aware layout engine has been developed, which enables integrating heterogeneous components, handling complex geometry, exploring a larger solution space, improved success rate, and providing options for multiobjective optimization algorithms in the optimized MCPM layout design process.
Abstract: As a critical energy-conversion system component, power semiconductor modules and their layout optimization has been identified as a crucial step in achieving the maximum performance and density for wide bandgap technologies (i.e., GaN and SiC). New packaging technologies are also introduced to produce reliable and efficient multichip power module (MCPM) designs to push the current limits. The complexity of the MCPM layout is surpassing the capability of a manual, iterative design process to produce an optimum design with agile development requirements. An electronic design automation tool called PowerSynth has been introduced with on-going research toward enhanced capabilities to speed up the optimized MCPM layout design process. As a part of this continuing research, in PowerSynth v1.9, a constraint-aware layout engine has been developed, which enables integrating heterogeneous components, handling complex geometry, exploring a larger solution space, improved success rate, and providing options for multiobjective optimization algorithms. The layout engine is generic, scalable, and efficient in performing electro-thermal optimizations on both 2-D and 2.5-D power modules. To validate these enhanced design capabilities, a 2.5-D full-bridge power module layout is designed, optimized, fabricated, and tested with measurement results matching closely with model prediction. This result closes the loop in the power electronics design process with an experimentally validated module design automation flow.

Journal ArticleDOI
TL;DR: In this paper, the correlation between the first thermal path and the second thermal path in the frequency-domain thermal model has been comprehensively analyzed and modeled, and a new method to determine the critical frequencies is thereby proposed.
Abstract: Based on the finding that the gain of heat flow inside a power semiconductor device behaves as a low-pass filter (LPF) under the frequency domain, an advanced thermal model developed in the frequency domain has been proposed in recent years. The main advantage of this model is that it can analyze the multitime scale thermal dynamics of power semiconductor devices under complex mission profiles. However, the critical frequencies in the LPF of this frequency-domain thermal model are still difficult to be accurately extracted, thus leading to inaccuracy in the predicted thermal behavior. In this article, the correlation between the first thermal path and the second thermal path in the frequency-domain thermal model has been comprehensively analyzed and modeled, and a new method to determine the critical frequencies is thereby proposed. The simulation and experimental results have been provided to verify the effectiveness of the proposed modeling and characterization method.

Journal ArticleDOI
TL;DR: A technique is proposed where the individual dies in a multidie power module can be selectively driven by a closely integrated gate buffer, and a profiling of the power loss within the intelligent power module is enabled.
Abstract: Due to practical limitations in the manufacturing of power semiconductor dies, high power modules are composed of several dies in parallel in order to meet the desired load current requirements. With careful attention to the design, modern insulated gate bipolar transistor (IGBT)-based power modules feature relatively balanced current distribution amongst the parallel dies. However, owing to the increased switching speeds of wide bandgap devices, i.e., silicon carbide (SiC), it is challenging to design the package to achieve both low-loss and balanced operation. In this article, a technique is proposed where the individual dies in a multidie power module can be selectively driven by a closely integrated gate buffer. Amongst the benefits achieved by selectively driving the die gates, a profiling of the power loss within the intelligent power module is enabled. Furthermore, a practical technique to estimate the individual die temperatures is presented, and using the same method, the on-state voltage of the power module during load current conduction can be estimated. Finally, it is experimentally demonstrated that the combination of individual junction temperature estimation and the selective gate driving can be used to increase the power density of the power module by better utilizing the component dies.

Journal ArticleDOI
TL;DR: In this article, a non-metallic jet impingement device is used to decrease power module temperatures and reduce the accentuation of EMI created by the module operating at high switching frequencies.
Abstract: As high voltage, wide-band-gap power modules increase in power density with high switching frequency, they create localized hot spots and harmful electromagnetic interference (EMI). If not treated properly, these issues can drastically reduce the reliability of the devices. In this article, we propose a solution to address both of these challenges created by power module building blocks which are designed for use in a hybrid-electric aircraft traction inverter. Additive manufacturing is used to fabricate a nonmetallic jet impingement device to decrease power module temperatures. Moreover, the nonmetallic structure limits the accentuation of EMI created by the module operating at high switching frequencies. Conjugate heat transfer simulations are used to predict the thermal performance of the cooler. In this article, a reduction of maximum die temperatures is observed, along with an increase in temperature uniformity throughout the base plate. Experimental results show a minimum thermal resistance of 0.1 K/W and an average heat transfer coefficient up to 3600 W/m2.K at peak operation. Finally, EMI tests are performed to show a two orders of magnitude reduction of parasitic capacitance using the nonmetallic cooler compared with a metallic heat sink. This directly leads to a 25 dB decrease in the common mode noise.

Journal ArticleDOI
TL;DR: In this paper, temperature sensitive electrical parameters (TSEPs) are used to determine the chip temperature of a single-chip insulated gate bipolar transistors (IGBT) power module by measuring one electrical device parameter.
Abstract: Temperature sensitive electrical parameters (TSEPs) are used to determine the chip temperature of a single-chip insulated gate bipolar transistors (IGBT) power module by measuring one electrical device parameter. Commonly, most TSEPs have a linear relationship between the chip temperature and the electrical parameter. Like any sensor, preferred attributes of TSEPs include good accuracy, linearity, and sensitivity. For multichip IGBTs (mIGBTs) modules, these can only be achieved when all chips have the same temperature. Equal chip temperatures among different semiconductor chips can be achieved when placing mIGBTs in environmental chambers to produce a homogeneous temperature distribution (HTD). In real applications, however, mIGBTs are power cycled and are exposed to inhomogeneous temperature distribution (ITD) where temperature differences exist between chips. Consequently, measuring one electric parameter only cannot represent each chip temperature which impacts the TSEP sensitivity, linearity, and accuracy. This article compares the performance of ten TSEPs applied to an mIGBT module operating at HTD and ITD conditions in order to determine which TSEPs are most suitable for mIGBTs in real applications.

Journal ArticleDOI
TL;DR: In this paper, an optimized 3L T-type neutral point clamped power module has been proposed with a hybrid combination of the switch (SiC mosfet + Si IGBT) rated for 1200 V/160 A.
Abstract: Three-level (3L) inverters suffer from higher parasitic inductance due to the increased number of series-connected switches in a single current commutation loop (CCL) results in a larger size of CCL compared to their two-level (2L) counterparts. As such, semiconductors are subjected to higher voltage stress and severe ringing at the switching transient. While silicon carbide's (SiC) faster switching speed improves overall efficiency by reducing switching loss, the faster voltage, and current gradient (d v /d t and d i /d t ) generate electromagnetic interference (EMI) noise, requiring a larger and complicated filter stage design. To solve this problem, an optimized 3L T-type neutral point clamped power module has been proposed with a hybrid combination of the switch (SiC mosfet + Si IGBT) rated for 1200 V/160 A. Two direct bonded copper (DBC) substrates have been stacked to have a vertical power loop using laser-drilled vias, which provides low commutation loop inductance as low as 4.6 nH for the major CCLs including the wire bond. Other associated CCLs have also been identified and optimized. Additional DBC in the package will be acting as an EMI shield. The EMI noise has been compared to a traditional power module and a 21 dB reduction of common-mode noise has been observed.

Journal ArticleDOI
TL;DR: In this paper, the role of metal spacer design in reducing the thermomechanical stress of solder joint in automotive double-sided cooling power electronics modules is addressed, and three new spacer shapes are explored.
Abstract: This article addresses the role of metal spacer design in reducing the thermomechanical stress of solder joint in automotive double-sided cooling power electronics modules. The performance and reliability of power modules are becoming increasingly important in electrified vehicles. A double-sided cooling structure has dual heat sinks placed on the top and bottom of the module and is the most promising solution for improving the thermal reliability of power modules. One of the unique components of this structure is its metal spacers, which are responsible for both electrical and thermal conductions via the connecting embedded power semiconductor dies and their top-side substrates. Reported spacers are typically cuboid in shape, providing a relatively large solder-contact area with the power dies. This large contact area is beneficial in reducing the electrical and thermal resistances, but it increases thermomechanical stress and may accelerate the deterioration of die-bonded solders. This article explores the role of three new spacer shapes in reducing the thermomechanical stress of the solder. Their performances are validated using both the finite-element method (FEM) simulations and thermal cycling experiments. In this article, an octagon-surface spacer demonstrates the best solder reliability compared to the two other designs and the conventional cuboid spacer.

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TL;DR: The developed study evaluated three different bidirectional dc–dc converter topologies and validated the developed prototype with experimental results, and demonstrated the effect of switching frequency and switch selection on the size of passive components, the converter efficiency, and the power density of the converter.
Abstract: This study proposes a flexible, compact, efficient, and cost effective electric vehicle-to-electric vehicle charge sharing solution that will lead to faster and wider customer adoption of electric vehicles (EVs) as an alternative to current grid-to-vehicle charging methodologies. The energy will be transferred between EVs using a bidirectional dc–dc converter in a conductive way, which can take place at parking lots of workplaces, campuses, or residential premises and highways. The proposed design provides compact infrastructure, wide input and output voltage ranges with bidirectional buck–boost operation, and fast power transfer compared to Level 2 charging stations. A complete design comparison between Si and SiC based converters has been carried out based on the available power modules and magnetic cores. The comparison demonstrates the effect of switching frequency and switch selection on the size of passive components, the converter efficiency, and the power density of the converter. The developed study evaluated three different bidirectional dc–dc converter topologies and validated the developed prototype with experimental results.