Showing papers on "Topology (electrical circuits) published in 1986"
TL;DR: In this paper, a current injection scheme is used to simulate the change in topology of a base network. But the injected currents are applied to the terminals of the elements of a socalled base network corresponding to those actually switched.
Abstract: Strategic switching can be achieved by a current injection scheme which simulates the change in topology. The injected currents are applied to the terminals of the elements of a socalled base network corresponding to those actually switched. This requires that the base network must contain all elements in the "in" state. The injected currents to be used as a compensation in the commonly employed system matrices (Y, Z) for the real change in topology can be taken as control variables in an optimization procedure for the switching problem. With the aid of a method similar to linear programming (LP) objective functions such as line current, short circuit current or even losses can be formulated. By means of a switching sequence consisting of elementary switching operations the desired objective function will be brought to its optimum value.
151 citations
TL;DR: In this paper, the rectifier-inverter types of static frequency changers (SFC's) typically employ bulky dc link reactive components to establish the required dc bus voltage.
Abstract: Rectifier-inverter types of static frequency changers (SFC's) typically employ bulky dc link reactive components to establish the required dc bus voltage. The negative effects of these components on overall system performance and evolution have been the subject of many past research publications. It is demonstrated that these unwanted components can be eliminated through the use of suitable SFC power circuit topologies. Two such topologies (i.e.,SFC Structures 1 and 2) are investigated here. These converter structures employ state-of-the-art power semiconductor components and optimized rectifier-inverter switching schemes. Finally, theoretical and experimental results show that proposed converter structures offer significant performance improvements at the cost of only moderate power and logic circuit complexity.
84 citations
TL;DR: In this article, a three-terminal model for the high electron mobility transistor (HEMT) using chargevoltage relationships derived from the Boltzmann transport was formulated, where the current transport of the two-dimensional electron gas (TEG) and the capacitance of the embedded parasitic MESFET structure were modeled.
Abstract: A three-terminal model is formulated for the high electron mobility transistor (HEMT) using charge-voltage relationships derived from the Boltzmann transport. Emphasis is placed on modeling the current transport of the two-dimensional electron gas (TEG) and the capacitance of the embedded parasitic MESFET structure. Furthermore, a distributed circuit topology is used to better model high-frequency effects, such as the transit time delay, in both small-signal and large-signal-transient analysis. The HEMT model is implemented in the circuit simulation program HP-SPICE. Both dc and ac simulation results are discussed.
61 citations
TL;DR: In this article, the state-space equations for low frequency components of states or outputs in PWM dc and ac converters are derived by inspection of converter topology and use of switching functions and duty ratios.
Abstract: Low frequency components of states or outputs in pulse-width modulation (PWM) dc and ac converters can be characterized by differential equations called describing state-space equations. These equations are derived by inspection of converter topology and use of switching functions and duty ratios. Their steady-state and small-signal dynamic solutions show how energy-storage elements in a converter/load system shape the frequency response of conversion functions established by the switches.
59 citations
01 Jan 1986
TL;DR: The emerging fundamental basis for analysis and design of complex electromagnetic systems, for protection against undesirable propagation of electromagnetic signals through the system, is known as electromagnetic topology, and is viewed as the basis for grounding and shielding.
Abstract: The emerging fundamental basis for analysis and design of complex electromagnetic systems, for protection against undesirable propagation of electromagnetic signals through the system, is known as electromagnetic topology. While this may be viewed as the basis for grounding and shielding, it is more general than that.
54 citations
01 Jan 1986
TL;DR: This paper reviews a subject which has developed over the past two decades: the optimal design of sensors for transient (or broadband) electromagnetic measurements and proper installation of the sensors involving concepts from topology and symmetry.
Abstract: This paper reviews a subject which has developed over the past two decades: the optimal design of sensors for transient (or broadband) electromagnetic measurements and proper installation of the sensors involving concepts from topology and symmetry.
33 citations
TL;DR: The typical design of a power circuit now used to interface a dc system to the electric utility is such that a heavily distorted current is drawn from the utility as discussed by the authors, since this distortion has the potential to interfere with the normal operation of the utility and its load, efforts are underway to develop power-conditioning interfaces that draw a nearly harmonic free ac current waveform.
Abstract: The typical design of a power circuit now used to interface a dc system to the electric utility is such that a heavily distorted current is drawn from the utility. Since this distortion has the potential to interfere with the normal operation of the utility and its load, efforts are underway to develop power-conditioning interfaces that draw a nearly harmonic-free ac current waveform. The design of these interfaces is discussed. The salient issues of the power circuit's topology and its control are presented.
29 citations
01 Jan 1986
TL;DR: In this paper, optical fibers interconnected to monolithic integrated optical components with GaAs MMIC array elements are proposed as a solution to overcome GaAsMMIC phased array signal distribution problems.
Abstract: A complex signal distribution system is required to feed and control GaAs monolithic microwave integrated circuits (MMICs) for phased array antenna applications above 20 GHz. Each MMIC module will require one or more RF lines, one or more bias voltage lines, and digital lines to provide a minimum of 10 bits of combined phase and gain control information. In a closely spaced array, the routing of these multiple lines presents difficult topology problems as well as a high probability of signal interference. To overcome GaAs MMIC phased array signal distribution problems optical fibers interconnected to monolithically integrated optical components with GaAs MMIC array elements are proposed as a solution. System architecture considerations using optical fibers are described. The analog and digital optical links to respectively feed and control MMIC elements are analyzed. It is concluded that a fiber optic network will reduce weight and complexity, and increase reliability and performance, but higher power will be required.
26 citations
Dissertation•
01 Mar 1986
TL;DR: The two topology algorithms discussed above are used to also solve the routing information problem, which is that of keeping each node informed of the packet transmission delay on each directed link in the network.
Abstract: : The topology problem in store and forward computer networks is that of keeping all nodes informed of the current operational status of each communication link in the network. The failure or repair of one or more communication links is called a topology change. Two efficient algorithms are presented for solving this problem. They require 0(l) communication and O(n) time for simple topology hanges in a network with l links and n nodes. The algorithms send messages only in resposne to topology changes, and each message usually contains information only about the links whose status has changed. The algorithms work properly in the presence of arbitrarily complex topology changes. The routing information problem is that of keeping each node informed of the packet transmission delay on each directed link in the network. Nodes need this information in order to make intelligent routing decisions. The two topology algorithms discussed above are used to also solve the routing information problem. The level of difficulty in solving this problem is found to depend greatly on the particular properties of the topology algorithm used.
19 citations
02 Jun 1986
TL;DR: In this paper, a broadband mixer topology, which can be implemented using either monolithic or discrete microwave integrated circuit methods, has been developed using distributed design techniques, and exhibits excellent conversion gain and frequency response characteristics with signal handling capabilities and LO drive requirements similar to conventional diode double-balanced mixers.
Abstract: A novel broadband mixer topology, which can be implemented using either monolithic or discrete microwave integrated circuit methods, has been developed using distributed design techniques. The mixer exhibits excellent conversion gain and frequency response characteristics with signal handling capabilities and LO drive requirements similar to conventional diode double-balanced mixers.
18 citations
01 Jan 1986
TL;DR: Some distributed networks rotocols proposed with claims that they operate correctly in the face of changing topology, without need for unbounded numbers to identify different runs of the algorithms, do not possess all the claimed properties.
Abstract: A number of distributed networks rotocols for reliable data transmission, connectivity test ortest path and topology broadcast have been proposed with claims that they operate correctly in the face of changing topology, without need for unbounded numbers to identify different runs of the algorithms. This paper shows that they do not possess all the claimed properties. However some of them can be modified so that that their correct operation can be demonstrated, at a cost of longer running time and of higher communication complexity.
IMEC1
TL;DR: For the verification and characterization rule based expert tools were developed to recognize registers, check the clocking rules, find the critical path and the appropriate test patterns to calculate the accurate delay via simulation.
Abstract: An environment for the generation of modules is described. It includes tools for interactive design of parameterised procedures describing the structure as well as the topology. For the layout symbolic cells are used which are automatically fitted together as defined by the topology. For the verification and characterization rule based expert tools were developed to recognize registers, check the clocking rules, find the critical path and the appropriate test patterns to calculate the accurate delay via simulation.
TL;DR: The immediately adaptive delta modulator (IADM) as mentioned in this paper was fabricated in a 3.5-/spl mu/m twin-tub CMOS process with an experimentally measured signal-to-noise ratio of 91 dB across the audio band (20 Hz-20 kHz) with a total harmonic distortion of less than 0.17%.
Abstract: The modulator is described at the system level by analyzing the system transfer function, stability, frequency response, and quantization noise. Individual circuit blocks are explained at device level. A comparator design which is based on presenting an amplified signal to a pull-up pull-down latch, commonly used in dynamic RAMs, is described. The immediately adaptive delta modulator (IADM) was fabricated in a 3.5-/spl mu/m twin-tub CMOS process. An experimentally measured signal-to-noise ratio of 91 dB across the audio band (20 Hz-20 kHz) with a total harmonic distortion of less than 0.17% is reported. These results demonstrate the potential of this topology for 16-bit audio-band A/D conversion.
01 Apr 1986
TL;DR: In this article, a core size determination, window area selection and winding methods of an integrated-magnetic switchmofe converter are discussed, using the popular forward topology as a baseline.
Abstract: Core size determination, window area selection and winding methods of an integrated-magnetic switchmofe converter are discussed, using the popular forward topology as a baseline. Alternate winding arrangements are presented for this converter, including two-bobbin approaches. Criteria is developed for rapid projection of weights and volume savings that can be achieved by the user of an integrated-magnetic system in this coverter circuit.
02 Jul 1986
TL;DR: This procedure can be used as a preprocessor for the algorithms for CVM problems and shows that the procedure is efficient and can identify most of essential vias.
Abstract: The objective of the via minimization is to assign wire segments into different layers to minimize the number of vias required. Several algorithms have been proposed for the Constrained Via Minimization (CVM) problem where the topology of the given layout is fixed. In a CVM problem, some vias may be "essential" to the given layout. That is, they have to be selected and cannot be replaced by other vias. In this paper we present a procedure to find most of the essential vias. This procedure can be used as a preprocessor for the algorithms for CVM problems. Experimental results show that the procedure is efficient and can identify most of essential vias.
TL;DR: A distributed algorithm is developed that can be used to compute the topology of a network, given that each site starts with information about sites it is adjacent to, the network is strongly connected, and communication channels are unidirectional.
TL;DR: A simple polynomial transformation is presented which permits efficient computation of SC state-variable coefficients directly from Z -domain specifications and demonstrates the practical utility of the method.
Abstract: A simple polynomial transformation is presented which permits efficient computation of SC state-variable coefficients directly from Z -domain specifications. The algorithm relies merely upon synthetic division. The technique is applied to synthesize a fourth-order elliptic filter using only forward difference integrators (FDI), or, alternatively, only backward difference integrators (BDI). A specific state-variable topology, the so-called observer canonical form, was chosen; the technique, however, is more generally applicable. The use of a single SC integrator topology permits a significant reduction in the number of switches. Experimental results are presented which demonstrate the practical utility of the method.
01 Jan 1986
TL;DR: In this article, a review of resonator-based microwave oscillator topologies is presented and a survey of available YIG/GGG materials and coupling structures are presented as a basis for design.
Abstract: Tunable Magnetostatic Wave Straight Edge Resonators (MSW-SERs) offer an alternative to YIG spheres and varactor diodes in microwave oscillators. Work on MSW-SERs is extended to coupling with active devices. Interactions increase insight into resonator characteristics. A brief review of resonator-based microwave oscillator topologies precedes a survey of available YIG/GGG materials and coupling structures. Circuit related properties of the MSW-SER are presented as a basis for design. Circuit topologies are compared and the negative resistance topology is selected. Several examples of tunable oscillators in the L, S, and K microwave frequency bands will be given with emphasis placed on tuning bandwidth, power handling, harmonic distortion and phase noise characteristics.
01 Apr 1986
TL;DR: In this article, a high frequency, 2Mhz, off-line switching regulator intended for applications in military use environments, has been implemented with PWM techniques, and the design trade-offs made in selecting the PWM approach for this relatively high frequency application, and provides an overview of the performance characteristics of the circuit and key critical components.
Abstract: A high frequency, 2Mhz, off-line switching regulator intended for applications in military use environments, has been implemented with PWM techniques. This paper describes the design trade-offs made in selecting the PWM approach for this relatively high frequency application, and provides an overview of the performance characteristics of the circuit and key critical components. This is an off-line power supply which must operate over a wide range of MIL-STD-704 aircraft prime power interface conditions. This power supply delivers three output voltages, each f u l l y regulated, at up to 50 watts total delivered power. The design will be implemented in a high density, hybrid configuration of approximately 10 watts per cubic inch, and will include the power processor and all filtering and bypass functions, except for rectification of the AC input lines, which is done external to the module. The circuits and components used to implement the power processing stage, the feedback control and stabilization network, and the overall supervisory circuit are discussed. Performance under high frequency load conditions is covered, as well as general regulator performance. A brief comparison of operating characteristics and complexity between this topology and an equivalent series resonant circuit is also given. This paper concludes with highlights of advanced packaging techniques similar to those to be used to implement this circuit in the high density configuration.
01 Oct 1986
TL;DR: In this article, a DC-to-AC inverter with a single switching stage followed by a linear amplifier is described, which is equally suited for operation at low power levels and at higher powers since Darlington Transistors or Gemfets can be used in the low frequency linear amplifier stage.
Abstract: A new DC to AC inverter concept has a single switching stage followed by a linear amplifier. It provides input to output isolation, circuit simplicity, ruggedness and low manufacturing cost. It is equally suited for operation at low power levels (i.e. ringing generators) and at higher powers since Darlington Transistors or Gemfets can be used in the low frequency linear amplifier stage. This new topology is compared to ferroresonant-transformer inverters, to bridge inverters with two switching stages in tandem, and to forward converter/synchronous rectifier combinations. A 50-VA ringing generator designed for Warren Communications (a unit of General Signal) is described. It operates from 50 VDC, has an adjustable frequency range of 16.67 Hz to 66.67 Hz and has an adjustable voltage range of 80 VAC to above 140 VAC. It is self-protected from overloads and transients. A DC to DC "WRAPAROUND" converter and it's Linear Amplifier circuits are described, together with circuits to improve efficiency. Voltage and Current-Mode systems are compared for transient stability and for output paralleling capability. A new circuit to absorb reflected power and improve efficiency for low power-factor inductive loads is described. (See Ref. 11.e and 11.g.)
TL;DR: Two heuristic methods of determining an optimal network topology are discussed and compared with that of Chopra et al. and are found to be successful in majority of cases.
Journal Article•
TL;DR: In this article, the authors considered a disjointly shared channel where more than one user pair can communicate simultaneously over physically disjointed parts of the channel. And they considered the question of how much extra capacity such a channel has over that of a broadcast channel, as measured by the number of user pairs on the channel, and the amount of extra capacity depends on the topology and the distribution of offered traffic.
Patent•
07 Jun 1986
TL;DR: In this article, a transformation instruction memory which converts 2D geometry into 3D geometry and performs a topology check is used to transfer control from a 2D instruction memory to 3D instructions.
Abstract: A computer aided design system comprises a processor which has access to different instruction memories. In a 2D mode of operation, the processor executes only the information stored in a 2D instruction memory, said instructions only referring to 2D geometry. If the processor receives a command related to 3D geometry, control is transferred to a transformation instruction memory which converts 2D geometry into 3D geometry and performs a topology check. Then (or upon entering of a 3D command) control is transferred to a 3D instruction memory which performs the necessary steps in 3D. The invention also relates to the method of system performance which allows easier and faster processing of geometric information.
01 Oct 1986
TL;DR: The Scott-T Connected Inverter (Scott-T) as mentioned in this paper is one of the first inverters with the topology described in this paper and has been widely used in the literature.
Abstract: A study of patents, publications, and applications indicates the first design and application of a "Scott-T Connected Inverter" was made by Warren Communications in 1972. The first installation of record was a 30-KVA inverter system now installed and operating at the Barkeley Bank in Jamaica. Since 1972, other companies are manufacturing inverters with this topology, including Permace Associates, Solidstate Controls, and HDR Power Systems. A sort through technical publications failed to produce any articles (except patents) which discuss the topology in detail. This paper attempts to cover some of the more important application problems which must be dealt with in order to have a safe, reliable, and satisfactory product. This paper also discusses some achievable specifications and performance limitations of the topology.
01 Oct 1986
TL;DR: In this article, the authors describe the development of a high-power, single-phase, off-line, switchedmode rectifier designed with full surveillance capability, which uses a double-forward converter topology with power MOSFET transistors.
Abstract: This paper describes the development of a high-power, single-phase, off-line, switched-mode rectifier designed with full surveillance capability. The rectifier uses a double-forward converter topology with power MOSFET transistors. The unit is convection cooled and uses epoxy bonding for the mounting of its power components. The unit is upgradable from a basic unit with essential alarm features only, to a full surveillance unit with numerous controls and alarms. The unit was designed for ease of manufacturability by having a modular type of construction with a minimal number of hard-wired connections. The problems and challenges of this approach will be discussed.
12 Jun 1986
TL;DR: In this article, the authors review the fundamental limitations of the fiber optic links in the LAN environment and address the criteria to select a suitable topology for a fiber optic based LAN, and discuss how the shortcomings of the bus topology can be circumvented in the centralized star-like wiring topology.
Abstract: The point-to-point fiber optic links have been proven to have better performance than the copper based media for long haul telephony application. Data rates in the gigabits/sec range and repeaterless operations over several hundred kilometers have been frequently reported. However, their use in a bus topology is severely limited by high tapping and splitting losses of optical power. This paper will review the fundamental limitations of the fiber optic links in the LAN environment and address the criteria to select a suitable topology for a fiber optic based LAN. It will also discuss how the shortcomings of the bus topology can be circumvented in the centralized star-like wiring topology. This centralized wiring topology is sufficiently flexible and well suited to design an architecture for the fiber optic based LAN.