Showing papers on "Transistor published in 1979"

Micromechanical membrane switches on silicon

Abstract: A new class of electronic devices, micromechanical membrane switches, has been developed. These switches have operating characteristics that fill the gap between conventional silicon transistors and mechanical electromagnetic relays. Although they are batch fabricated on silicon using conventional photolithographic and integrated circuit processing techniques, their unique properties allow them to perform functions not ordinarily associated with silicon. The devices are basically extremely small, electrostatically controlled mechanical relays, typically less than 100 µm long. Their high off-to on-state impedance ratio and all-metal conduction paths make them ideally suited for ac signal switching arrays. This paper describes the design, fabrication, operating behavior, and potential applications of these voltage-controlled, micromechanical switches.

Amorphous-silicon field-effect device and possible application

Abstract: The characteristics of an insulated-gate field-effect transistor made from amorphous silicon (a-Si) deposited in a glow discharge are discussed. It is suggested that the a-Si device could be applied with advantage in an addressable matrix of a liquid-crystal display panel.

Coagulation instrument automatic HF switching circuit - has first lead to potentiometer and second to transistor base

Abstract: The circuit which automatically switches on the high-frequency current of a coagulation instrument has two leads The first (1) is connected to a potention-meter (P1), whose other terminal has a 9-volt potential applied to it, while the second (2) is connected via a resistance (R2) to the base of a transistor (T1) A second resistance (R3) connects this lead to the neutral point of the voltage source The base of the transistor (T1) is earthed via a capacitor (C1), while the +9-volt supply is applied to the collector through a third resistance (R1), and its emitter is earthed Its collector is connected via a second potentiometer (P2) and a fourth resistance (R4) to the base of a second transistor (T2) The second transistor collector terminal leads via a relay (Rel) and a diode (D1), in parallel, back to the first transistor collector The connecting point between the second potentiometer and the fourth resistance is earthed via a second capacitor (C2)

Bipolar transistor design for optimized power-delay logic circuits

Abstract: This design optimization scheme provides a procedure for tailoring the impurity doping profile of the transistor so that the performance of the logic circuit can be optimized at a specific power dissipation level and a given lithographic line width. It is shown that the condition of the optimized circuit performance dictates a set of relationships between the transistor structure, the logic voltage swing, and the value of the circuit elements. This paper further discusses the relation between the circuit properties and the transistor size, which becomes smaller as the lithography advances. It is concluded that as the horizontal dimensions are reduced, the vertical dimension of the transistor must be reduced, the impurity density increased, and the current density increased in order to increase the circuit speed. A simple relationship between the lithographic line width and the vertical structure is given which enables one to predict the power-speed performance for the reduced structure.

Sensing amplifier for floating gate memory devices

Abstract: An MOS sensing amplifier for sensing the binary state of floating gate memory devices in a read-only memory is disclosed The potentials on the column lines in the memory are held to a narrow voltage swing A pair of "zero" threshold voltage transistors having slightly different threshold voltages are used to maintain the potentials on these lines A potential developed from the column line is compared with a reference potential developed with a "dummy" biasing network and a "dummy" floating gate memory device

Overload protection circuit for output driver

Abstract: A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.

Monolithic integration of an injection laser and a metal semiconductor field effect transistor

Abstract: A new laser structure, the ’’T‐laser’’, has been monolithically integrated with a MESFET on a semi‐insulating GaAs substrate. Integration is achieved by means of a compatible structure in which the optically active layer of the laser also serves as the electrically active layer of the MESFET. Direct modulation of the laser by means of the transistor is demonstrated.

On the I-V characteristics of floating-gate MOS transistors

Abstract: The effects of capacitive coupling on the I-V characteristics of floating-gate MOS transistors are described. A set of modified IV equations for these devices is presented and compared with experimental results.

Refractory metal gate processes for VLSI applications

Abstract: The conventional n-channel silicon-gate MOS technology faces limitations due to poly-sheet resistance, patterning, and overall process compatibility as feature dimensions shrink and circuit sizes increase. This work describes an investigation of refractory metals as alternate gate material due to their potential advantages in terms of patternability, film sheet resistance that is 50 to 100 times lower comparable to polysilicon, and circuit layout options with improved performance and cost effectiveness. A process was developed for fabrication of NMOS devices using electron-beam direct writing, refractory metal gates and interconnects. Evaporated as well as sputtered molybdenum and tungsten show columnar crystalline structure allowing reproducible patterning of 1-µm lines with the conventional plasma etch techniques. Sheet resistivities of 0.25 Ω/□ and 0.4 Ω/□ were achieved for 3500-A Mo and W films, respectively. Basic parameters such as electronic work function, interface, and surface state charge densities and MOS transistor threshold voltages were determined from metal gate devices with 200-800-A oxides. Flat-band voltages of -0.2 V with mid 1010cm-2interface charges were achieved. Mo-Al-Si double-level metal structure with contacts as small as 2 µm2were fabricated. Considerable improvement in the speed of the LSI circuits fabricated with these high-conductivity gates was demonstrated through computer simulation. Improved circuit layouts of static and dynamic memory cells for speed, power, and density optimization can be achieved. A four-mask process with the simplicity of aluminum gate technology and the performance of current n-channel silicon gate MOS process is proposed.

EPROM Reliability test circuit

Abstract: On-chip circuitry for measuring the threshold voltage and hence the data retention reliability of the floating gate transistors used in erasable programmable read-only computer memories. Upon the application of a program "verification" signal, an externally adjustable and calibrated voltage ramp is applied by the test circuit to each of the memory X-lines coupled to the gate elements of the memory transistors. The threshold voltage of a selected transistor can then be determined by increasing the voltage ramp to the point at which the transistor will read out.

Ignition apparatus for internal combustion engine

Abstract: PURPOSE:To prevent recirculation phenomenon and allow the stable electric discharge of an ignition plug to be continued by applying the noise voltage in the operating signals of a current-cut-off element to the control element for controlling the cut-off element. CONSTITUTION:The base resistance of a cut-off transistor 10 is divided into two parts 8A and 8B, and the collector of a controlling transistor 18 is connected between resistances 8A and 8B, and the emitter is grounded. The base of the controlling transistor 18 is connected with the output of an amplification circuit 6 through a condenser 17 and connected with the point which divides the power voltage through resistors 15 and 16, and a bias voltage is applied. The resistor 8A and the condenser 17 transmitts effectively only high frequency voltages such as noise voltage. The second turning-ON of the cut-off transistor 10 directly after the primary current of an ignition coil 13 is cut-off is removed.

A monolithic 14-bit D/A converter

Abstract: A monolithic 14-bit D/A converter using `dynamic element matching' to obtain a high accuracy and good long-term stability is described. Over a temperature range from -50/spl deg/ to 70/spl deg/C the nonlinearity is less than one-half least significant bit (/SUP 1///SUB 2/LSB). Dynamic tests show a distortion at a level of about -90 dB with respect to the maximum sinewave output. Nearly no glitches are found, so the converter can be operated without a deglitcher circuit. The chip, with a size of 3.1/spl times/3.2 mm, contains all elements needed, except the output amplifier and digital input latches.

High density VMOS electrically programmable ROM

Abstract: An electrically programmable memory array is made by a process in which the memory elements are capacitor devices formed in anisotropically etched V-grooves to provide enhanced dielectric breakdown at the apex of the groove. After breakdown, a cell exhibits a low resistance to a grounded substrate. Access transistors in series with the memory elements have control gates which also form address lines. The oxide thickness in the V-groove may be thinner than the gate oxide thickness for the access transistor providing a lower programming voltage. These factors provide a very small high speed device.

Vertical field effect transistor with improved gate and channel structure

Abstract: A high frequency field effect transistor of gallium arsenide or other III-V semiconductor compounds has a preferentially etched trapezoidal groove structure in the top surface which creates parallel trapezoidal semiconductor fingers that are wider at the top than at the bottom. Schottky gates or junction gates are fabricated within the grooves surrounding the elongated fingers. The vertical conducting channels between the gates are narrow leading to a high blocking gain, and more contact area is available at the top of the device.

Josephson junction with lateral injection as a vortex transistor

Abstract: Long narrow Josephson junctions with current injection to their long (lateral) sides are examined theoretically Injection into a finite number of points as well as distributed injection are considered The external magnetic field effect on the critical current and on the I-V curves is calculated It is shown that the junction with current injection into many points in parallel is an almost complete analog of a conventional semiconductor transistor, the role of electric charge carriers being played by Josephson vortices carrying a single flux quanta The use of a vortex transistor as a circuit element of both analog and digital devices is discussed

Circuit for switching and transmitting alternating voltages

Abstract: A circuit for switching and transmitting alternating voltages comprise an MOS transistor, the pn-junctions which surround the source and drain regions being biased in a blocking direction in the driven condition of the transistor, correspondence between the potential difference between gate and alternating voltages and the required drive voltage of the transistor being achieved by a circuit which largely synchronizes gate voltage changes with the alternating voltage to be transmitted.

Two-dimensional semiconductor analysis using finite-element method

Abstract: Two-dimensional simulation of semiconductor devices using a finite-element formulation is described. In the present analysis, Poisson's equation is solved by a finite-element method, based on the variational principle, and current continuity equations are solved by a method of weighted residuals. The advantage of this method is mentioned. In order to demonstrate the validity of this method, a bipolar n-p-n transistor is analyzed, considering the generation-recombination term. Not only voltage-current characteristic, but also junction capacitance and cutoff frequency are calculated. Then transistor behavior under inverse mode by using the n-type buried layer as a common emitter is discussed.

Light-induced effects in GaAs f.e.t.s

Abstract: It is shown theoretically and experimentally that the variations of the d.c. and dynamic properties in a GaAs f.e.t. when a light beam strikes the transistor's gate can be accounted for by an appropriate change in the gate-junction equivalent built-in voltage. A simple relationship connects this change with the variations of the light intensity.

Transistor logic output for reduced power consumption and increased speed during low to high transition

Abstract: In a transistor logic output device the improvement comprising an active element discharging transistor coupled between the base of the pulldown element transistor and ground or low potential for actively controlling a route to ground or low potential for diverting and discharging so-called capacitive feedback Miller current generated during the low to high voltage transition at the output of the device resulting from base-collector junction capacitance in the pulldown element transistor. The invention includes capacitive coupling means coupled at the base of the active element discharging transistor to follow changes in voltage at the device output and capacitively feed back current during transistion from low to high potential at the device output for driving the base of the discharge transistor thereby providing a low impedance path to ground or low potential at the base of the pulldown element transistor for diverting and discharging capacitive Miller feedback current.

Hot-electron camel transistor

Abstract: A transistor is proposed in which hot electrons cross a degenerate semiconductor base region and overcome a potential barrier in the bulk of the semiconductor which forms a collector. Structures in silicon corresponding to this concept have been fabricated using low-energy ion implantation and have given transistor action consistent with hot-electron transport.

Method of making CMOS integrated circuit device

Abstract: An improved CMOS device and method of making it are provided which utilize basically the standard N-channel self-aligned silicon gate structure and process, modified to include a P-channel transistor. A P-type substrate is used as the starting material, with an N-type tank formed for the P-channel transistor. Field oxide is grown after the N-type tank is formed. A polycrystalline silicon layer is deposited and patterned to create gates for both N- and P-channel transistors, then separately masked P- and N-type diffusions or implants form the sources and drains for the two types of transistors.

Gigabit electronics—A review

Abstract: Digital electronics at gigabit-per-second data rates is emerging as a new branch of science and engineering. A particular field of application opens up in advanced radar and sensing systems where large amounts of data have to be dealt with in real time. Analog-to-digital (A/D) converters with microwave sampling rates and multipliers for high-data-yield processing are specifically required subcircuits. In communications, special 1 to 2 Gbit/s systems have been developed, but a further commercial need develops in domestic satellite links and in fiber-optical communications with its potential high bandwidth capabilities. Corresponding gigabit measuring and test instrumentation is required and being implemented. Gigabit circuitry has so far mainly been realized in hybrid-integrated technology. However, the full use of modern technological tools now allows for the fabrication of gigabit monolithic integrated circuits (IC's), with circuits up to 4 Gbit/s implemented. In circuit design, specific problems must be solved which are due to the involved wide bandwidths at microwave spectral frequencies. High packing density is required for low interconnection delay, but power dissipation leads to limitations. Gigabit electronics is based on devices with switching speeds in the range of a few hundred picoseconds and lower. Besides pin diodes and Schottky diodes, transistors are investigated at first. While the Si bi-polar has been improved, it is the GaAs MESFET and the GaAs junction FET which excel in speed, with LSI capabilities. Very recently, a considerable speed improvement was reported for Si n-MOSFET's. Unique properties for gigabit logic are shown by transferred-electron devices. However, the lead with regard to high speed and low power have Josephson junctions of the in-line junction and of the interferometer types. The present phase of rapid gigabit IC development, with expected LSI circuits in the 2 to 5 Gbit/s range and MSI circuits up to 15 Gbit/s, will stimulate further applications.

Electronic overload protection circuit

Abstract: A solid-state overload protection circuit for protecting a multiple-stage compound transistor power amplifier. The overload protection circuit includes a current-limiting circuit for sensing or limiting the current during an overload condition. The current-limiting circuit includes a transistor which conducts to limit the current in the output stages of the multiple-stage power amplifier. A monitoring circuit including a timing circuit, a comparator, and a switching transistor monitors the duration of the overload condition and disables the input stages of the multiple-stage power amplifier when a prolonged overload condition persists.

Static inverter employing an assymetrically energized inductor

Abstract: A static inverter employing an inductor and an electrical gain element for intermittent assymetric energization of the inductor from a dc source is described. Reliable intermittent operation of the gain element, typically a power transistor, is achieved by use of three feedback windings which in response to saturation of a branch of the core of the inductor but before full core saturation, discontinue regenerative feedback and then apply degenerative feedback. This turn off mechanism protects the transistor from high current stresses. Passive means are provided such as a capacitor for momentarily storing the energy or diode means for coupling the energy back to the source or to the load to protect the transistor from the high voltage surge and the energy release when current flow in the inductor is interrupted. Energy stored in the capacitor may be used for transistor commutation.

Voltage detection circuit

Abstract: A voltage detection circuit, for detecting two voltages, that is, a high voltage level and a low voltage level, is disclosed. The voltage detection circuit according to the present invention includes a load element group having a first terminal and a second terminal, and a transistor which is connected between the second terminal of the load element group and ground. The sum of threshold voltages of the load element group has a value higher than the low voltage level to be detected and lower than the high voltage level to be detected. The load element group is kept in an off state when the low voltage level is applied thereto and is kept in on state when the high voltage level is applied thereto. The voltage to be detected is applied to the first terminal of the load element group and, when the voltage to be detected has a high voltage level, a low voltage is supplied to a control terminal of the transistor, and; when the voltage to be detected has a low voltage level, a high voltage is supplied to the control terminal of the transistor, so that the voltage to be detected is estimated by a voltage at a connection point between the second terminal of the one space load element group and the transistor.

Electrically reprogrammable non volatile memory

Abstract: An electrically reprogrammable non-volatile memory device is disclosed which includes complementary MOS transistors provided with a polycrystalline silicon floating gate electrode in a common n - -type substrate. The device comprises three main parts. The first part, which is used for writing, comprises a p-channel writing transistor, a p-channel control transistor and a resistance element. The second part, which comprises a second gate electrode capacitance coupled with the floating gate, is used for erasing. The third part is used for performing information read-out and consists of a p-channel transistor the gate of which forms a portion of the floating gate and the drain of which is connected to a read-out terminal and to the terminal of a loading element having its other terminal connected to a negative supply potential. This device enables writing control to be performed using a logical signal of the order of one volt, read-out being also performed with a low voltage value, with low energy consumption. Erasure of information can be performed electrically and the retention time is of several years.

Direct current power supply

Abstract: Direct Current power supply for providing a relatively low stabilized d.c. voltage from a relatively high a.c. voltage primary power source without the use of a transformer. The d.c. value is developed across a variable impedance device coupled substantially in series with the current path established between the source of a.c. power and a functional load coupled to the source of a.c. power. Through effective control of the variable impedance so as to be at a minimum value, e.g. low impedance, through one half-cycle of the a.c. waveform and further to purposefully effect a high impedance through a small part of the second half-cycle whereupon it changes to a condition of low impedance, a stable unidirectional current flow is established in a secondary circuit which is filtered and results in a stabilized direct current power source well suited for supplying low demand circuits as typified by solid-state control circuits employing transistors and integrated circuits; microprocessors; low power amplifiers, oscillators, and timers; and other such devices.

One-dimensional device model of the npn bipolar transistor including heavy doping effects under fermi statistics

Abstract: Carrier transport equations extended to Fermi statistics will be given with characteristic parameters, including heavy doping effect. These equations will be solved numerically by introducing a new method for calculating the parameters. Calculated results will accurately reproduce the significant decrease in transistor current gain with a high impurity concentration at emitter-base junction.

Fabrication and microwave performance of the permeable base transistor

Abstract: A new transistor with the potential for extremely high frequency performance has been fabricated. A two-dimensional numerical simulation has indicated that a transistor with a maximum frequency of oscillation approaching 1000 GHz is achievable. The unique feature of this device is an extremely fine tungsten grating which is embedded inside a single crystal of n-type gallium arsenide.

MOS Voltage Reference based on Polysilicon Gate Work Function Difference

Abstract: A voltage reference in CMOS technology is based upon transistor pairs of the same type except for the opposite doping type of their polysilicon gates. At identical drain currents, the gate voltage difference, close to the silicon bandgap, is 1.2 V/spl plusmn/0.06 V. Circuits for a positive and for a negative voltage reference are presented. Digital voltage tuning improves accuracy. Temperature compensation is provided by proper choice of current ratio or by means of an auxiliary circuit. Voltage drift is about 300 ppm//spl deg/C without compensation, and can be reduced to /spl plusmn/30 ppm//spl deg/C. The circuits work with a supply voltage of 2-10 V and draw a current that is less than 1 /spl mu/A.