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Paul S. Ho

Researcher at University of Texas at Austin

Publications -  481
Citations -  14016

Paul S. Ho is an academic researcher from University of Texas at Austin. The author has contributed to research in topics: Electromigration & Dielectric. The author has an hindex of 60, co-authored 475 publications receiving 13444 citations. Previous affiliations of Paul S. Ho include National Institute of Standards and Technology & IBM.

Papers
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Journal ArticleDOI

Interdiffusion at the polyimide-Cu interface

TL;DR: In this paper, it is argued that the kinetics of Cu-polyimide interdiffusion is determined by atomic diffusion of Cu and that chemical effects do not appear to play an important role.
Journal ArticleDOI

Micro-Raman spectroscopy and analysis of near-surface stresses in silicon around through-silicon vias for three-dimensional interconnects

TL;DR: In this article, the authors analyzed the near-surface stress distribution in a TSV structure based on a semi-analytic approach and finite element method, in comparison with micro-Raman measurements.
BookDOI

Advanced Interconnects for ULSI Technology

TL;DR: Advanced Interconnects for ULSI Technology as discussed by the authors is dedicated to the materials and methods which might be suitable replacements for copper/low-k interconnects and discusses a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects.
Journal ArticleDOI

Characterization of thermal stresses in through-silicon vias for three-dimensional interconnects by bending beam technique

TL;DR: In this article, an experimental technique is presented to characterize thermal stresses in TSVs during thermal cycling based on curvature measurements of bending beam specimens, and finite element analysis is performed to determine the stress distribution and the effect of localized plasticity to account for TSV extrusion observed during annealing.
Journal ArticleDOI

Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias

TL;DR: It was found that plastic deformation is localized within the Cu vias near the via/Si interface and may play an important role in TSV extrusion and the effect of thermal stresses on carrier mobility was investigated to evaluate the keep-out zone for logic devices near the TSVs.