M
Matthieu Berthomé
Researcher at École Polytechnique Fédérale de Lausanne
Publications - 13
Citations - 411
Matthieu Berthomé is an academic researcher from École Polytechnique Fédérale de Lausanne. The author has contributed to research in topics: MOSFET & Threshold voltage. The author has an hindex of 6, co-authored 13 publications receiving 354 citations. Previous affiliations of Matthieu Berthomé include Centre national de la recherche scientifique & University of California, San Diego.
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Journal ArticleDOI
Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm
Sylvain Barraud,Matthieu Berthomé,R. Coquand,Mikael Casse,Thomas Ernst,Marie-Pierre Samson,P. Perreau,Konstantin Bourdelle,Olivier Faynot,Thierry Poiroux +9 more
TL;DR: In this article, the performance of high-κ /metal gate nanowire (NW) transistors without junctions is reported, with a channel thickness of 9 nm and sub-15-nm gate length and width.
Journal ArticleDOI
Revisited parameter extraction methodology for electrical characterization of junctionless transistors
Dae-Young Jeon,Dae-Young Jeon,So Jeong Park,So Jeong Park,Mireille Mouis,Matthieu Berthomé,Sylvain Barraud,Gyu Tae Kim,Gerard Ghibaudo +8 more
TL;DR: In this paper, junctionless transistors (JLTs) fabricated on (100) silicon on insulator (SOI) wafer with 145mm and 9mm silicon thickness were considered.
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Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor
Elizabeth Buitrago,Giorgos Fagas,Montserrat Fernandez-Bolanos Badia,Yordan M. Georgiev,Matthieu Berthomé,Adrian M. Ionescu +5 more
TL;DR: In this article, the authors proposed a long channel (L > 500 nm) junctionless nanowire transistor (JNT) SiNW sensor based on a highly doped, ultrathin body field-effect transistor with an organic gate dielectric epsilon(r) = 1.7.
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Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm
TL;DR: In this article, the first systematic study on electron mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm was performed.
Proceedings ArticleDOI
Application-oriented performance of RF CMOS technologies on flexible substrates
Justine Philippe,A. Lecavelier,Matthieu Berthomé,Jean-François Robillard,Christophe Gaquiere,Francois Danneville,Daniel Gloria,C. Raynaud,Emmanuel Dubois +8 more
TL;DR: In this article, the authors demonstrated the ultimate-thinning-and-transfer-bonding (UTTB) of RF SOI-CMOS chips on plastic, metal and glass substrates.