40 Gbps heterostructure germanium avalanche photo receiver on a silicon chip

TLDR: In this paper, a 40 Gbps direct detection of chip-integrated silicon-germanium avalanche p-i-n photo receiver driven with low-bias supplies at 1.55 µm wavelength is reported.

Abstract: Photodetectors are cornerstone components in integrated optical circuits and are essential for applications underlying modern science and engineering. Structures harnessing conventional crystalline materials are typically at the heart of such devices. In particular, group-IV semiconductors such as silicon and germanium open up more possibilities for high-performing on-chip photodetection thanks to their favorable electrical and optical properties at near-infrared wavelengths and processing compatibility with modern chip manufacturing. However, scaling the performance of silicon-germanium photodetectors to technologically relevant levels and benefiting from improved speed, reduced driving bias, enhanced sensitivity, and lowered power consumption arguably remains key for densely integrated photonic links in mainstream shortwave infrared optical communications. Here we report on a reliable 40 Gbps direct detection of chip-integrated silicon-germanium avalanche p-i-n photo receiver driven with low-bias supplies at 1.55 µm wavelength. The avalanche photodetection scheme calls upon fabrication steps commonly used in complementary metal-oxide-semiconductor foundries, alleviating the need for complex epitaxial wafer structures and/or multiple ion implantation schemes. The photo receiver exhibits an internal multiplication gain of 120, a high gain-bandwidth product up to 210 GHz, and a low effective ionization coefficient of ∼0.25. Robust and stable photodetection at 40 Gbps of on–off keying modulation is achieved at low optical input powers, without any need for receiver electronic stages. Simultaneously, compact avalanche p-i-n photodetectors with submicrometric heterostructures promote error-free operation at transmission bit rates of 32 Gbps and 40 Gbps, with power sensitivities of −12.8dBm and −11.2dBm, respectively (for 10−9 error rate and without error correction coding during use). Such a performance in an on-chip avalanche photodetector is a significant step toward large-scale integrated optoelectronic systems. These achievements are promising for use in data center networks, optical interconnects, or quantum information technologies.