Journal ArticleDOI
A 256/spl times/256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output
S.J. Decker,D. McGrath,K. Brehmer,Charles G. Sodini +3 more
- Vol. 33, Iss: 12, pp 2081-2091
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TLDR
A 256x256 CMOS active pixel sensor (APS) is described for an automotive stereo-vision system that simultaneously provides flexibility, user-adjustability, and digital control, with no reduction of fill factor.Abstract:
A 256x256 CMOS active pixel sensor (APS) is described for an automotive stereo-vision system. Illumination may vary over several orders of magnitude, requiring a high dynamic range imager. Dynamic range is increased 20/spl times/ using a special clocking scheme for the lateral overflow gate. This dynamic range enhancement offers improvements over previously-described techniques. It simultaneously provides flexibility, user-adjustability, and digital control, with no reduction of fill factor. On-chip column-parallel cyclic analog-to-digital converters (ADCs) produce digital output at frame rates from 30 to 390 frames/s.read more
Citations
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Dissertation
Analysis and design of a wide dynamic range pulse-frequency modulation CMOS image sensor
Pixel structure withlogarithmic response forintelligent and flexible imager architectures
N. Ricquier,B. Dierickx +1 more
TL;DR: In this article, an XY-addressable image architecture based on thispixel was implemented in insilicon and measurement data on this sensor was discussed, where the logarithmic response was quantified using a more general signal tonoise ratio.
Proceedings ArticleDOI
A global shutter CMOS image sensor with wide dynamic range pixel
TL;DR: In this paper, a novel five transistor global shutter active pixel with ultra-high dynamic range is presented, where a global shutter control transistor is added to traditional four transistor pixel to eliminate fixed pattern noise and random noise.
Proceedings Article
Low voltage low power CMOS image sensor with a new rail-to-rail readout circuit
Hwang-Cherng Chow,Jen-Bor Hsiao +1 more
TL;DR: In this paper, a new rail-to-rail pixel readout architecture is proposed to enhance the performance of CMOS image sensor for both low voltage and low power applications, which can extend its operating voltage from 3.3V even down to 1.8V for a 0.35 µm process.
Proceedings ArticleDOI
Model for electrical simulation of photogate active pixel sensor
TL;DR: A new electrical simulation model for photogate active pixel sensor in CMOS imagers is proposed and simulation results show great improvements in simulation accuracy of the proposed model versus others ones.
References
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TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Journal ArticleDOI
A ratio-independent algorithmic analog-to-digital conversion technique
TL;DR: An algorithmic analog-to-digital conversion technique is described which is capable of achieving high-resolution conversion without the use of matched capacitors in an MOS technology.
Book
Charge Transfer Devices
TL;DR: It is projected that charge transfer devices will rapidly find their way into certain analog delay, image sensing, and digital applications.
Journal ArticleDOI
256/spl times/256 CMOS active pixel sensor camera-on-a-chip
TL;DR: In this paper, an active pixel sensor (APS) is integrated on a CMOS chip with the timing and control circuits, and signal conditioning to enable random access, low power (/spl sim/5 mW) operation, and low read noise (13 e/sup -/ rms).