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A Four-Step Method for De-Embedding Gigahertz

TLDR
The proposed de-embedding method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS and allows large devices to be measured with high accuracy.
Abstract
In this paper, a de-embedding method is proposed for conducting accurate on-wafer device measurements in the gi- gahertz range. The method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS. The method assumes a probe-tip two-port calibration performed with well-known techniques and impedance substrates. By employing a physical interpretation of the test-fixture, the method alleviates a number of known prob- lems with common de-embedding procedures. Four distinct math- ematical steps are suggested to de-embed parasitics for the test-fix- ture to give an accurate measurement of the device under test. By introducing a simple compensation factor for in-fixture stan- dard imperfections, the proposed method allows large devices to be measured with high accuracy. The applicability of the method is demonstrated with measurements up to 12 GHz.

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Citations
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MOSFET modeling for RF IC design

TL;DR: In this paper, a high-frequency (HF) modeling of MOSFETs for radiofrequency (RF) integrated circuit (IC) design is discussed by accounting for important physical effects at both dc and HF.
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A calibrated lumped-element de-embedding technique for on-wafer RF characterization of high-quality inductors and high-speed transistors

TL;DR: In this article, a new de-embedding strategy using a physics-based lumped-element model for the test-structure parasitics calibrated on the frequency-dependent "open" and "short" dummy impedances is described, which reduces the experimental uncertainty on the deembedded figures of merit.
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A robust high-Q micromachined RF inductor for RFIC applications

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Shield-based microwave on-wafer device measurements

TL;DR: In this paper, a shield-based test fixture is proposed for microwave on-wafer device characterization, which offers full scalability and very low cost, high measuring accuracy, mitigation of leakage problems associated with lossy substrates, and large measuring realism.
References
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Book

Operation and modeling of the MOS transistor

TL;DR: In this article, the MOS transistors with ION-IMPLANTED CHANNELS were used for CIRCUIT SIMULATION in a two-and three-tier MOS structure.
Proceedings ArticleDOI

An improved de-embedding technique for on-wafer high-frequency characterization

TL;DR: In this paper, an improved correction procedure for on-wafer S-parameter measurements has been developed and implemented, which takes the effects of series parasitics into account in a simple, straightforward way.
Journal ArticleDOI

A three-step method for the de-embedding of high-frequency S-parameter measurements

TL;DR: In this paper, the authors proposed a general method of deembedding S-parameter measurements of the device under test (DUT) for which typical parasitics associated with probe pads and interconnect-metal lines can be deembedded from the measurement.
Journal ArticleDOI

Accurate SOI MOSFET characterization at microwave frequencies for device performance optimization and analog modeling

TL;DR: An original scheme is presented, which allows reliable identification of the parameters of the non-quasi-static (NQS) small-signal model for MOSFETs by combining careful design of probing and calibration structures, rigorous in situ calibration, and a new powerful direct extraction method.
Proceedings ArticleDOI

On-wafer calibration techniques for giga-hertz CMOS measurements

TL;DR: In this article, five different methods for performing on-wafer calibration of RF CMOS measurements are presented, and a comparison of method performance up to 12 GHz is made with measurements on RF-CMOS devices.
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