An Improved gm/ID Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design

TLDR: An improved g m /I D methodology for the design of low-power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology and the advantage of the improved methodology over the traditional methodology has been discussed and illustrated with simulation results.

Abstract: This paper presents an improved g m /I D methodology for the design of low-power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology. This methodology takes into considerations the dependence of the Early voltage parameter with the bias points of a nano-scale MOS transistor. With such considerations, the DC voltage gain of the circuit can be controlled by adjusting the bias points of the transistors and keeping the channel length constant. The advantage of the improved methodology over the traditional methodology has been discussed and illustrated with simulation results.