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Proceedings ArticleDOI

An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers

Andrea Bevilacqua, +1 more
- pp 382-533
TLDR
A UWB 3.1 to 10.6 GHz LNA employing an input three-section band-pass Chebyshev filter is reported, which achieves a power gain of 9.3 dB with an input match of 9 mW.
Abstract
A UWB 3.1 to 10.6 GHz LNA employing an input three-section band-pass Chebyshev filter is reported. Fabricated in a 0.18 /spl mu/m CMOS process, -10 dB over the band, a NF of 4 dB, and an IIP3 of -6.7 dBm while consuming the IC achieves a power gain of 9.3 dB with an input match of 9 mW.

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Citations
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Journal ArticleDOI

An ultra-wideband CMOS low noise amplifier for 3-5-GHz UWB system

TL;DR: In this paper, an ultra wideband (UWB) CMOS low noise amplifier (LNA) topology that combines a narrowband LNA with a resistive shunt-feedback is proposed.
Journal ArticleDOI

A Broadband Noise-Canceling CMOS LNA for 3.1–10.6-GHz UWB Receivers

TL;DR: An ultra-wideband 3.1-10.6-GHz low-noise amplifier employing a broadband noise-canceling technique is presented, which achieves a power gain of 9.7 dB over a -3 dB bandwidth of 1.2-11.9-GHz and a noise figure of 4.5-5.1 dB in the entire UWB band.
Journal ArticleDOI

A Highly Linear Broadband CMOS LNA Employing Noise and Distortion Cancellation

TL;DR: A broadband inductorless low-noise amplifier (LNA) design that utilizes simultaneous noise and distortion cancellation is presented and is demonstrated to have a minimum internal gain of 14.5 dB.
Proceedings Article

A 3-10-Ghz low-noise amplifier with wideband LC-ladder matching network

Aly Ismail, +1 more
TL;DR: In this paper, a SiGe amplifier with on-chip matching network spanning 3-10 GHz was presented, achieving 21dB peak gain, 2.5dB noise figure, and -1dBm input IP3 at 5 GHz, with a 10-mA bias current.
Journal ArticleDOI

A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network

TL;DR: In this article, a SiGe amplifier with on-chip matching network spanning 3-10 GHz was presented, achieving 21dB peak gain, 2.5dB noise figure, and -1dBm input IP3 at 5 GHz, with a 10-mA bias current.
References
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Journal Article

The design of CMOS radio-frequency integrated circuits, 2nd edition

TL;DR: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Book

The Design of CMOS Radio-Frequency Integrated Circuits

TL;DR: In this article, the authors present an expanded and thoroughly revised edition of Tom Lee's acclaimed guide to the design of gigahertz RF integrated circuits, which is packed with physical insights and design tips, and includes a historical overview of the field in context.
Journal ArticleDOI

A fully integrated 0.5-5.5 GHz CMOS distributed amplifier

TL;DR: In this article, a fully integrated 0.5-5.5 GHz CMOS-distributed amplifier is presented, which is a four stage design fabricated in a standard 0.6-/spl mu/m three-layer metal digital-CMOS process.
Proceedings ArticleDOI

Noise cancelling in wideband CMOS LNAs

TL;DR: In this article, a noise-cancelling technique in a wideband LNA achieves low noise figure (NF) and source impedance matching without global feedback, and the 0.25 μm LNA provides <2.4 dB NF from 0.01-2 GHz, total voltage gain is 13.7 dB, -3 dB bandwidth is 0.1-1.6 GHz, S/sub 12/ is <-36 dB, and s/sub 11/ is −10 dB.
Proceedings ArticleDOI

A 0.6-22-GHz broadband CMOS distributed amplifier

TL;DR: In this article, a CMOS distributed amplifier (DA) covering 0.6 to 22 GHz is presented, which achieves measured gain of 7.3 /spl plusmn/ 0.8 dB with chip area of 0.9 /spl times 1.5 mm/sup 2/ including testing pads.
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