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Journal ArticleDOI

A Broadband Noise-Canceling CMOS LNA for 3.1–10.6-GHz UWB Receivers

Chih-Fan Liao, +1 more
- 29 Jan 2007 - 
- Vol. 42, Iss: 2, pp 329-339
TLDR
An ultra-wideband 3.1-10.6-GHz low-noise amplifier employing a broadband noise-canceling technique is presented, which achieves a power gain of 9.7 dB over a -3 dB bandwidth of 1.2-11.9-GHz and a noise figure of 4.5-5.1 dB in the entire UWB band.
Abstract
An ultra-wideband 3.1-10.6-GHz low-noise amplifier employing a broadband noise-canceling technique is presented. By using the proposed circuit and design methodology, the noise from the matching device is greatly suppressed over the desired UWB band, while the noise from other devices performing noise cancellation is minimized by the systematic approach. Fabricated in a 0.18-mum CMOS process, the IC prototype achieves a power gain of 9.7 dB over a -3 dB bandwidth of 1.2-11.9-GHz and a noise figure of 4.5-5.1 dB in the entire UWB band. It consumes 20 mW from a 1.8-V supply and occupies an area of only 0.59 mm2

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Citations
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Journal ArticleDOI

A Highly Linear Broadband CMOS LNA Employing Noise and Distortion Cancellation

TL;DR: A broadband inductorless low-noise amplifier (LNA) design that utilizes simultaneous noise and distortion cancellation is presented and is demonstrated to have a minimum internal gain of 14.5 dB.
Journal ArticleDOI

A Low-Power, Linearized, Ultra-Wideband LNA Design Technique

TL;DR: Experimental results show that the linearization technique improves the cascode LNA's IIP3 by a factor of 3.5, and analyzes its performance with Volterra series.
Book ChapterDOI

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Thomas H. Lee
TL;DR: In this paper, an expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Proceedings Article

Cognitive Radio Design Challenges and Techniques

TL;DR: Several multi-decade carrier generation techniques are proposed and a CMOS prototype is presented that exhibits a phase noise of -94 to -120 dBc/Hz at 1-MHz offset while consuming 31 mW.
Journal ArticleDOI

Cognitive Radio Design Challenges and Techniques

TL;DR: In this article, a new CMOS low-noise amplifier topology for the range of 50 MHz to 10 GHz is introduced that achieves a noise figure of 2.9 to 5.7 dB with a power dissipation of 22 mW.
References
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Journal Article

The design of CMOS radio-frequency integrated circuits, 2nd edition

TL;DR: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems.
Journal ArticleDOI

A 1.5-V, 1.5-GHz CMOS low noise amplifier

TL;DR: In this article, a 1.5 GHz low noise amplifier (LNA) intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6/spl mu/m CMOS process.
Journal ArticleDOI

Ultra-wideband wireless systems

TL;DR: In this article, two UWB multiband systems, frequency hopping and Spectral Keying, have been described, both of which meet the stringent requirements provided by IEEE 802.15.3a.
Journal ArticleDOI

Wide-band CMOS low-noise amplifier exploiting thermal noise canceling

TL;DR: In this article, a feed-forward noise-canceling technique is proposed to cancel the noise and distortion contributions of the matching device, which allows for designing wide-band impedance-matching amplifiers with noise figure (NF) well below 3 dB.
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