Proceedings ArticleDOI
ASIC implementation of frequency domain equalizer for single carrier transmission
Kazuhiro Komatsu,Suguru Kameda,Makoto Iwata,Shoichi Tanifuji,Noriharu Suematsu,Tadashi Takagi,Kazuo Tsubouchi +6 more
- pp 1-4
TLDR
An application specific integrated circuit (ASIC) chip for the SC-FDE is implemented on Taiwan Semiconductor Manufacturing Company (TSMC) 180 nm complementary metal-oxide semiconductor (CMOS) and the degradation of measured Eb/N0 from computer simulation is found to be less than 1 dB.Abstract:
Since single-carrier (SC) transmission using frequency domain equalization (FDE) with minimum mean square error (MMSE) operates at lower peak-to-average power ratio (PAPR) than orthogonal frequency division multiplexing (OFDM), SC-FDE with MMSE is a main candidate for uplink of cellular system such as long term evolution (LTE). In this paper, an application specific integrated circuit (ASIC) chip for the SC-FDE is implemented on Taiwan Semiconductor Manufacturing Company (TSMC) 180 nm complementary metal-oxide semiconductor (CMOS). The chip size is 5.86 mm2. The power consumption is 200 mW at data rate of 4.86 Mbit/s. In the condition of 16 paths uniform power delay profile, at a bit error rate (BER) of 10−4, the degradation of measured E b /N 0 from computer simulation is found to be less than 1 dB.read more
Citations
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Journal ArticleDOI
Design and verification of a frequency domain equalizer
TL;DR: This work shows the efficiency of combining simulation and formal verification based methods in verifying complex systems such as the frequency domain equalizer.
Proceedings ArticleDOI
FPGA implementation of SC-FDE for 60 GHz WPAN
TL;DR: SC-FDE transceiver with fractional-spaced Minimum Mean Square Error Frequency Domain Equalization (MMSE-Fde) equalization and time domain channel estimation that is compliant with the IEEE 802.15.3c standard is implemented on FPGA platform and the performance of the implemented transceiver is evaluated in different millimetre wave indoor channels.
Proceedings ArticleDOI
Performance evaluation of time and frequency domain equalizers
TL;DR: This paper presents performance evaluation of two implementations of an equalizer: a time domainequalizer (TDE) based on the Least Mean Squares (LMS) algorithm and a frequency domain equalizer (FDE), and shows that the FDE is more efficient in terms of computational complexity and resources.
Book ChapterDOI
Connectivity in Wireless Telecommunications
Kazuo Tsubouchi,Fumiyuki Adachi,Suguru Kameda,Mizuki Motoyoshi,Akinori Taira,Noriharu Suematsu,Tadashi Takagi,Hiroshi Oguma,Minoru Fujishima,Ryuji Inagaki,Masaomi Tsuru,Eiji Taniguchi,Hiroshi Fukumoto,Akira Matsuzawa,Masaya Miyahara,Makoto Iwata,Fumihiro Yamagata,Noboru Izuka +17 more
TL;DR: In this chapter, the connectivity of wireless telecommunication is undertaken as a central issue, while keeping in mind that the next-generation wireless will take on broader and ubiquitous machine-to-machine (M2M) applications, and that the communication traffic will be 1000 times heavier in 10 years.
Journal ArticleDOI
64.8 GHz Wireless personal area network characterisation using single-carrier frequency domain equalisation for indoor channels
TL;DR: In this article, a 64.8 GHz single-carrier transmission with frequency domain equalization (SC-FDE) is presented and its back-to-back performance verified.
References
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Journal ArticleDOI
The CORDIC Trigonometric Computing Technique
TL;DR: The trigonometric algorithms used in this computer and the instrumentation of these algorithms are discussed in this paper.
Journal ArticleDOI
Frequency domain equalization for single-carrier broadband wireless systems
TL;DR: This article surveys frequency domain equalization (FDE) applied to single-carrier (SC) modulation solutions and discusses similarities and differences of SC and OFDM systems and coexistence possibilities, and presents examples of SC-FDE performance capabilities.
Journal ArticleDOI
Polyphase codes with good periodic correlation properties (Corresp.)
TL;DR: This correspondence describes the construction of complex codes of the form exp i \alpha_k whose discrete circular autocorrelations are zero for all nonzero lags.
Journal ArticleDOI
Channel estimation techniques based on pilot arrangement in OFDM systems
TL;DR: This work has implemented a decision feedback equalizer for all sub-channels followed by periodic block-type pilots and compared the performances of all schemes by measuring bit error rates with 16QAM, QPSK, DQPSK and BPSK as modulation schemes, and multipath Rayleigh fading and AR based fading channels as channel models.
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