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Journal ArticleDOI

Design of Testable Reversible Sequential Circuits

TLDR
The proposed sequential circuits based on conservative logic gates outperform the sequential circuits implemented in classical gates in terms of testability and a new conservative logic gate called multiplexer conservative QCA gate (MX-cqca) that is not reversible in nature but has similar properties as the Fredkin gate of working as 2:1 severalxer is presented.
Abstract
In this paper, we propose the design of two vectors testable sequential circuits based on conservative logic gates. The proposed sequential circuits based on conservative logic gates outperform the sequential circuits implemented in classical gates in terms of testability. Any sequential circuit based on conservative logic gates can be tested for classical unidirectional stuck-at faults using only two test vectors. The two test vectors are all 1's, and all 0's. The designs of two vectors testable latches, master-slave flip-flops and double edge triggered (DET) flip-flops are presented. The importance of the proposed work lies in the fact that it provides the design of reversible sequential circuits completely testable for any stuck-at fault by only two test vectors, thereby eliminating the need for any type of scan-path access to internal memory cells. The reversible design of the DET flip-flop is proposed for the first time in the literature. We also showed the application of the proposed approach toward 100% fault coverage for single missing/additional cell defect in the quantum-dot cellular automata (QCA) layout of the Fredkin gate. We are also presenting a new conservative logic gate called multiplexer conservative QCA gate (MX-cqca) that is not reversible in nature but has similar properties as the Fredkin gate of working as 2:1 multiplexer. The proposed MX-cqca gate surpasses the Fredkin gate in terms of complexity (the number of majority voters), speed, and area.

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Citations
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Journal ArticleDOI

Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability

TL;DR: The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability and is able to achieve 100% fault tolerance in the presence of single missing or additional cell defects in QCA layout.
Journal ArticleDOI

Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder

TL;DR: The functionality and correctness of the proposed full adder is confirmed using high-level synthesis, which is followed by delineating its normal and faulty behavior using a Probabilistic Transfer Matrix (PTM) method, and results demonstrate the superiority of the proposal in terms of latency, complexity and area with respect to previous full adders.
Journal ArticleDOI

Towards ultra-efficient QCA reversible circuits

TL;DR: The proposed reversible gate has a superb performance in implementing the QCA standard benchmark combinational functions in terms of area, complexity, power consumption, and cost function in comparison to the other reversible gates.
Journal ArticleDOI

Restoring and non-restoring array divider designs in Quantum-dot Cellular Automata

TL;DR: These designs use well-organized arithmetic components as their basic construction parts and take some design rules into consideration which make them reliable and more robust against noise, and are probed in terms of complexity, clocking and latency.
Proceedings ArticleDOI

Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits

TL;DR: The proposed binary tree based design methodology for NxN reversible quantum multiplier performs the addition of partial products in parallel using the reversible ripple quantum adders with no garbage output and ancilla bit, thereby minimizing the number of anCilla and garbage bits used in the design.
References
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Book

Conservative logic

TL;DR: Conservative logic shows that it is ideally possible to build sequential circuits with zero internal power dissipation and proves that universal computing capabilities are compatible with the reversibility and conservation constraints.
Journal ArticleDOI

Logical devices implemented using quantum cellular automata

TL;DR: This work examines the possible implementation of logic devices using coupled quantum dot cells, which use these cells to design inverters, programmable logic gates, dedicated AND and OR gates, and non‐interfering wire crossings.
Journal ArticleDOI

A method of majority logic reduction for quantum cellular automata

TL;DR: A method for reducing the number of majority gates required for computing three-variable Boolean functions is developed to facilitate the conversion of sum-of-products expression into QCA majority logic.
Journal ArticleDOI

Dynamic behavior of quantum cellular automata

TL;DR: In this paper, the authors examine the dynamic behavior of quantum cellular automata, arrays of artificial quantum-dot cells that can be used to perform useful computations, and they develop several approximate techniques for reducing the size of the basis set required.
Journal ArticleDOI

Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs

TL;DR: Novel designs of reversible sequential circuits that are optimized in terms of quantum cost, delay and the garbage outputs are presented and a novel strategy of cascading a Fredkin gate at the outputs of a reversible latch is introduced to realize the designs of the Fredkin Gate based asynchronous set/reset D latch and the master-slave D flip-flop.