Showing papers in "Microelectronics Journal in 2015"

TL;DR: A comprehensive power dissipation analysis as well as a structural analysis over the previously published five-input majority gates is performed and reveals that the proposed designs have significant improvements in contrast to counterparts from implementation requirements and power consumption aspects.

TL;DR: A new robust five-input majority gate is first presented, which is appropriate for implementation of simple and efficient QCA circuits in single layer and has a simple and robust structure that helps achieving minimal area, as well as reduction in hardware requirements and clocking zone numbers.

TL;DR: The functionality and correctness of the proposed full adder is confirmed using high-level synthesis, which is followed by delineating its normal and faulty behavior using a Probabilistic Transfer Matrix (PTM) method, and results demonstrate the superiority of the proposal in terms of latency, complexity and area with respect to previous full adders.

TL;DR: A practical approach is suggested in which the forward current is split into two parts in a straightforward manner, which can be identified from isothermal LED characteristics measured in industry standard LED test setups using textbook techniques.

TL;DR: Some remarkable results are reported: the relaxation time is observed being inversely proportional to the product of number of cells in the architecture and quadratic function of quantum number as well as intermediate quantum number.

TL;DR: Energy-efficient multiple valued logic circuits based on carbon nanotube field effect transistor (CNTFET) are proposed, designed based on the unique properties of CNTFETs, such as having same mobility for electrons and holes and also capability of adopting desirable threshold voltage by adjusting the CNTs diameters.

TL;DR: A new solution for an ultra-low-voltage, low-power, bulk-driven fully differential-difference amplifier (FDDA) is presented and tested in two applications; the differential voltage follower and the second-order band-pass filter, showing satisfactory accuracy and dynamic range.

TL;DR: This paper introduces interesting active element and its application in the field of square and triangular wave generators and main features of the circuits are compared to electronically controllable solutions of recent development in this field.

TL;DR: This work reports on a model that exhibits pinched hysteresis yet it may represent a nonlinear inductor or a non linear capacitor or a derivative-controlled nonlinear resistor/transconductor, which has inverse-memristor characteristics.

TL;DR: Results show that the Schottky Source Drain contact (SSD) high-k passivated AlGaN/GaN device is suitable for high power application.

TL;DR: In this paper, primitive logic blocks based on MCM design style are also extended to special logic types like Domino logic and programmable logic array (PLA), and an overview of modeling principles that would allow designers to venture into this new integrated domain.

TL;DR: For the first time, DC characteristics and analog/RF performances for nanowire quadruple-gate (QuaG) gate-all-around (GAA) metal oxide semiconductor field effect transistor (MOSFET) are analyzed using isomorphic polynomial function for potential distribution.

TL;DR: A nonvolatile memory cell, based on the hybrid structure of memristor and Complementary Metal-Oxide-Semiconductor (CMOS) is proposed which can be used as a resistive Random Access Memory (RAM).

TL;DR: This publication gives an overview on the theoretical framework which allows extending the existing thermal metrics in a compliant way on semiconductor devices with multiple heat sources.

TL;DR: The purpose of this research is to provide a physical explanation for improved analog and RF performance exhibited by the device.

TL;DR: A random number generator whose randomness derives from a Boolean chaotic oscillator, designed and fabricated as an integrated circuit, and analyzed using NIST standard statistical tests after subsequent post-processings.

TL;DR: An innovative sensitive test method is developed to detect solder joint cracking for high power LED packages based on transient thermal analysis and can fully replace the still dominating light-on test.

TL;DR: This paper describes the design and analysis of broadband transimpedance amplifiers (TIAs) based on Regulated Cascode (RGC) configuration and eliminates the effects of these parasitic components by absorbing them in a T-matching network.

TL;DR: A new memristor crossbar architecture that is proposed for use in a high density cache design that has less than 10% of the write energy consumption and allows better performance along with lower system power when compared to the STT-MRAM and SRAM caches.

TL;DR: A linearized ultra-wideband (UWB) CMOS Low Noise Amplifier (LNA) is presented, enhanced by exploiting PMOS-NMOS common-gate (CG) inverter as a built-in linearizer which leads to cancel out both the second- and third-order distortions.

TL;DR: A highly linear CMOS low noise amplifier for ultra-wideband applications that improves both input second- and third-order intercept points (IIP2 and IIP3) by canceling the common-mode part of all intermodulation components from the output current.

TL;DR: The proposed memristor-based redundant binary adder circuit tries to achieve the theoretical advantages of the redundant binary system, and to eliminate the carry (borrow) propagation using signed digit representation.

TL;DR: The proposed LDO architecture is based on differential transconductance amplifiers pairing with push-pull stage to enable effective output driving capability, and the transient response of the LDO is enhanced by a pair of CMFB resistors.

TL;DR: This paper presents Floating gate MOS (FGMOS) based low-voltage low-power variant of recently proposed active element namely Voltage Differencing Inverting Buffered Amplifier (VDIBA) that is capable of realizing all the standard filter functions in both inverting and non-inverting forms simultaneously without any matching constraint.

TL;DR: The present numerical investigation is concerned with the role of second-order temperature jump in a horizontal planar micro-channel heat transfer and solves numerically Dual-Phase-Lag model in a two dimensional configuration coupled with a new jump boundary condition.

TL;DR: If QCA consolidates as a possible CMOS substitute, this study can impact the design of future components that uses TCAM and CAM such as routers and switches respectively.

TL;DR: All-optical implementations of binary adders using MZI switches, which have been validated through numerical simulation of the switch models, are presented.

TL;DR: A crosstalk noise model of CMOS gate-driven coupled multi-walled carbon nanotube (MWCNT) interconnects based on finite-difference time-domain (FDTD) technique is presented and it is observed that the results closely match with that of H SPICE simulations and at the same time the model is more time efficient than the HSPICE.

TL;DR: The modified GDI cell (m-GDI) based on the basic GDIcell is proposed and then SRAM cell memory with 8 transistors (8T-SRAM) which uses the proposed GDI Cell is presented and the stability-power dissipation ratio (SPR) is improved.

TL;DR: In order to get a wideband and flat gain, a resistive-feedback LNA using a gate inductor to extend bandwidth is proposed in this paper, based on an improved Resistive-Feedback topology with a source follower feedback to match input.