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Enhanced system sleep state support in servers using non-volatile random access memory

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TLDR
In this article, a non-volatile random access memory (NVRAM) is used in a computer system to enhance support to sleep states, which includes a processor, a NVRAM that is byte-rewritable and byte-erasable, and power management (PM) module.
Abstract
A non-volatile random access memory (NVRAM) is used in a computer system to enhance support to sleep states. The computer system includes a processor, a non-volatile random access memory (NVRAM) that is byte-rewritable and byte-erasable, and power management (PM) module. A dynamic random access memory (DRAM) provides a portion of system address space. The PM module intercepts a request initiated by an operating system for entry into a sleep state, copies data from the DRAM to the NVRAM, maps the portion of the system address space from the DRAM to the NVRAM, and turns off the DRAM when transitioning into the sleep state. Upon occurrence of a wake event, the PM module returns control to the operating system such that the computer system resumes working state operations without the operating system knowing that the portion of the system address space has been mapped to the NVRAM.

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References
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Proceedings ArticleDOI

Architecting phase change memory as a scalable dram alternative

TL;DR: This work proposes, crafted from a fundamental understanding of PCM technology parameters, area-neutral architectural enhancements that address these limitations and make PCM competitive with DRAM.
Proceedings ArticleDOI

Scalable high performance main memory system using phase-change memory technology

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Phase-change random access memory: a scalable technology

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Proceedings ArticleDOI

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