Proceedings ArticleDOI
Error diagnosis of sequential circuits using region-based model
Anand L. D'Souza,Michael S. Hsiao +1 more
- pp 103-108
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TLDR
Experimental results on benchmark circuits are used to demonstrate rapid and accurate locating of multiple errors and the effectiveness of the region based model for gate connection and gate substitution errors.Abstract:
Algorithms to locate multiple design errors using region-based model are studied for both combinational and sequential circuits. The model takes locality aspect of errors and is based on a 3-value, non-enumerative analysis technique. Studies show the effectiveness of the region based model for gate connection and gate substitution errors. For sequential circuits, we try to locate the time frame at which the error was first excited, by re-simulating as few vectors as possible preceding the erroneous vector in a fully initialized circuit to carry out the diagnosis. Experimental results on benchmark circuits are used to demonstrate rapid and accurate locating of multiple errors.read more
Citations
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Proceedings ArticleDOI
A region based approach for the identification of hardware Trojans
Mainak Banga,Michael S. Hsiao +1 more
TL;DR: This work proposes a circuit partition based approach to detect and locate the embedded Trojan and provides a power profile based method for refining the candidate regions that may contain a Trojan.
Journal ArticleDOI
Scalable Hardware Trojan Diagnosis
Sheng Wei,Miodrag Potkonjak +1 more
TL;DR: This work has developed a scalable HT detection and diagnosis approach that uses segmentation and gate level characterization (GLC) and is capable of detecting and diagnosing HTs accurately on large circuits.
Proceedings ArticleDOI
Debugging sequential circuits using Boolean satisfiability
TL;DR: An extensive suite of experiments with large sequential circuits confirm the robustness and efficiency of the proposed logic debugging methodology and suggest that Boolean satisfiability provides an effective platform for sequential logic debugging.
Proceedings ArticleDOI
Debugging sequential circuits using Boolean satisfiability
Moayad Fahim Ali,Andreas Veneris,Sean Safarpour,Magdy S. Abadir,Rolf Drechsler,Alex J. Smith +5 more
TL;DR: An extensive suite of experiments with large sequential circuits confirm the robustness and efficiency of the proposed logic debugging methodology and suggest that Boolean satisfiability provides an effective platform for sequential logic debugging.
Journal ArticleDOI
Diagnosis of Integrated Circuits With Multiple Defects of Arbitrary Characteristics
Xiaochun Yu,R.D. Blanton +1 more
TL;DR: Results from extensive simulation experiments and real failing integrated circuits show that this method can effectively diagnose circuits that are affected by a large (>20) or small number of defects of various types.
References
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Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Journal ArticleDOI
Logic design verification via test generation
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Proceedings ArticleDOI
Sequential circuit test generation using dynamic state traversal
TL;DR: A new method for state justification is proposed for sequential circuit test generation, using the linear list of states dynamically obtained during the derivation of test vectors to guide the search during state justification.
Proceedings ArticleDOI
POIROT: a logic fault diagnosis tool and its applications
TL;DR: A logic diagnosis tool with applicability to a spectrum of logic DFT, ATPG and test strategies including full/almost fullscan circuits with combinational ATPG, partial-scan and non-scan circuits in general and to functional patterns in general is presented.
Proceedings ArticleDOI
Multiple error diagnosis based on xlists
TL;DR: This paper presents multiple error diagnosis algorithms to overcome two significant problems associated with current error diagnosis techniques targeting large circuits: their use of limited error models and a lack of solutions that scale well for multiple errors.