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Journal ArticleDOI

Improved Switched-Capacitor Integrated Multilevel Inverter With a DC Source String

TLDR
An improved topology, namely the one-switched-capacitor integrated MLI (1SCI-MLI) is proposed in this paper, which resolves the high voltage stress problem in the existing counterparts.
Abstract
The integration of switched-capacitor techniques into multilevel inverters (MLIs) with a dc source string contributes to the boosting of voltage gain, renders it particularly attractive in reducing the number of input dc sources in the series string. However, the recent two-stage MLI topologies suffer from high voltage stress across the backend H-bridge. Addressing this concern, an improved topology, namely the one-switched-capacitor integrated MLI (1SCI-MLI) is proposed in this paper. An extended topology of 1SC-MLI is also established by appropriate incorporation of another switched-capacitor circuit. The two proposed topologies are endowed with voltage boosting capability. They also feature low switch count and low number of dc sources. More importantly, they resolve the high voltage stress problem in the existing counterparts. Their corresponding operational analysis and comparisons with recent MLI topologies are discussed. Simulation and experimental results from a laboratory prototype are presented to validate the effectiveness of the proposed topologies.

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Citations
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Journal ArticleDOI

Single-Phase Step-Up Switched-Capacitor-Based Multilevel Inverter Topology With SHEPWM

TL;DR: The proposed SCMLI topology consists of nine power semiconductor switches with one dc voltage source and two capacitors, capable of generating a nine-level output voltage waveform with twice voltage gain and a selective harmonic elimination pulsewidth modulation technique is applied.
Journal ArticleDOI

A Survey on Reduced Switch Count Multilevel Inverters

TL;DR: In this article, a comprehensive review and classification of RSC-MLI topologies, in terms of their structure, features, limitations, suitability and selection for specific applications, is presented.
Journal ArticleDOI

Dual asymmetrical dc voltage source based switched capacitor boost multilevel inverter topology

TL;DR: A switched capacitor MLI topology has been presented, which utilises lesser switches and dc power supply and generates a 13-level output voltage.
Journal ArticleDOI

Dual input switched-capacitor-based single-phase hybrid boost multilevel inverter topology with reduced number of components

TL;DR: A new switched-capacitor-based topology with features of boosting and self-voltage balancing of the capacitor has been proposed in this study and the experimental results have verified the feasibility of the proposed topology.
Journal ArticleDOI

A Single-Source Nine-Level Boost Inverter With a Low Switch Count

TL;DR: In this article , a single-phase nine-level inverter based on a switched-capacitor network with a single switch was proposed, which reduces the number of switches while generating a boosted dc-link voltage.
References
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Journal ArticleDOI

Recent Advances and Industrial Applications of Multilevel Converters

TL;DR: This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry.
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Multilevel Inverter Topologies With Reduced Device Count: A Review

TL;DR: In this article, some of the recently proposed multilevel inverter topologies with reduced power switch count are reviewed and analyzed, both in terms of the qualitative and quantitative parameters.
Journal ArticleDOI

Hybrid Multilevel Inverter Using Switched Capacitor Units

TL;DR: Two new topologies are proposed for multilevel inverters that reduce the number of switches and isolated dc voltage sources, the variety of the dc voltage source values, and the size and cost of the system in comparison with the conventional topologies.
Journal ArticleDOI

Packed U Cells Multilevel Converter Topology: Theoretical Study and Experimental Validation

TL;DR: A new power multilevel converter topology that is very competitive compared to the existing ones that consists of packed U cells (PUC), which offers high-energy conversion quality using a small number of capacitors and power devices and consequently, has a very low production cost.
Journal ArticleDOI

Multilevel Converters: Fundamental Circuits and Systems

TL;DR: Six family members of the modular multilevel cascade converters, intended for grid-tied applications and medium-voltage high-power motor drives are paid much attention.
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