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Patent

Line edge roughness measuring technique and test structure

Boaz Brill
TLDR
In this paper, a test structure is presented test structure on a substrate for monitoring a LER and/or LWR effect, said test structure comprising an array of features manufactured with amplified LER or LWR effects.
Abstract
A test structure is presented test structure on a substrate for monitoring a LER and/or LWR effect, said test structure comprising an array of features manufactured with amplified LER and/or LWR effect.

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Citations
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Patent

Lithographic Focus and Dose Measurement Using A 2-D Target

TL;DR: In this article, a test pattern is configured such that changes in focus and dose can be easily determined by measuring the properties of a pattern that is exposed using the mask, where physical or geometric properties are different in each of the two dimensions.
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Measurement of line-edge-roughness and line-width-roughness on pre-layered structures

TL;DR: In this paper, line roughness measurements are used to estimate an aspect of line quality and are separated into groups depending upon pre-layers, and image data collected from similar pre-layer types are considered together.
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Scatterometry measurement of line edge roughness in the bright field

TL;DR: In this paper, an artificial conformal liner on a simulation test structure absorbs the same amount of light that otherwise would be scattered in the dark-field by a rough surface, which is correlated to line edge roughness.
Patent

Edge detection system and its use for optical proximity correction

Mack Chris
TL;DR: In this article, a method for determining roughness of a feature in a pattern structure includes generating, using an imaging device, a set of one or more images, each including measured linescan information that includes noise, and then detecting edges of the features within the pattern structure of each image without filtering the images, generating a biased power spectral density (PSD) dataset representing feature geometry information corresponding to the edge detection measurements.
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System and method for removing noise from roughness measurements

Mack Chris
TL;DR: In this paper, a method for determining roughness of a feature in a pattern structure includes generating, using an imaging device, a set of one or more images, each including measured linescan information that includes noise, and then detecting edges of the features within the pattern structure of each image without filtering the images, generating a biased power spectral density (PSD) dataset representing feature geometry information corresponding to the edge detection measurements.
References
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Patent

Ion sources, systems and methods

TL;DR: In this paper, the ion sources, systems and methods can enhance the ability to make tips having desired physical attributes (e.g., the number of atoms on the apex of the tip).
Patent

Optical measurements of line edge roughness

Boaz Brill
TL;DR: A method and system for optical measurements of line edge roughness (LER) of patterned structures based on illuminating the structure with incident radiation and detecting a spectral response of the structure, and further applying software and/or hardware utilities for deriving information representative of said line edge Roughness parameter/s from said spectral response as mentioned in this paper.
Proceedings ArticleDOI

Line edge roughness characterization of sub-50nm structures using CD-SAXS: round-robin benchmark results

TL;DR: In this paper, a series of photoresist line/space patterns featuring line width roughness measured by critical dimension small angle x-ray scattering (CDSAXS) is presented.
Patent

Extraction of tool independent line-edge-roughness (LER) measurements using in-line programmed LER and reliability structures

TL;DR: In this paper, a system that facilitates extraction of line edge roughness measurements that are independent of proprietorship of a metrology device comprises a structure patterned onto silicon with known line-edge roughness values associated therewith.
Patent

Device to determine line edge roughness effect on device performance

TL;DR: In this paper, a patterned feature of interest is formed over a gate oxide, extends over the channels ( 320 ) in a direction which is transverse to the source regions and the drain regions ( 306), and forms a common gate for a plurality of transistors ( 302 a-302 n ) formed with the plurality of source regions ( 304 ) and drain regions( 306 ).