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Journal ArticleDOI

Modeling of saturation transconductance for short-channel MOSFETs

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TLDR
In this article, an accurate saturation transconductance model for short-channel MOSFETs is developed by considering several secondary effects including the channel length modulation, mobility degradation, drain induced barrier lowering, and threshold voltage variation.
Abstract
By considering several secondary effects including the channel length modulation, mobility degradation, drain induced barrier lowering, and threshold voltage variation, an accurate saturation transconductance model for short-channel MOSFETs is developed. The calculated values of saturation transconductance agree well with the BSIM3 simulation results and the experimental results for devices with effective channel length in the range of 0.44-10 μm. This model has the advantages of less number of model parameters and can be used to analyze the small signal performance of analog circuits.

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Citations
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Proceedings ArticleDOI

Investigation of high temperature effects on MOSFET transconductance (g/sub m/)

TL;DR: In this article, high temperature effects on CMOS transconductance (g/sub m/) were investigated in linear and saturation regions, and the saturation region at temperatures between 27-200/spl deg/C were observed to intersect at one gate bias point.
Journal ArticleDOI

RF dynamic and noise performance of Metallic Source/Drain SOI n-MOSFETs

TL;DR: In this paper, a detailed study of the RF and noise performance of n-type Schottky barrier (SB) MOSFETs with a particular focus on the influence of the SBH on the main dynamic and noise figures of merit is presented.
Journal ArticleDOI

Radio frequency/analog and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor:

TL;DR: The results indicate that the down scaled JL DGMOS shows great promise to become a competitive contender for analog/mixed signal system on chip applications by demonstrating a significant improvement in its RF performance with gate-length downscaling.
Proceedings ArticleDOI

A new method to achieve RF linearity in SOI nanowire MOSFETs

TL;DR: The experiments show that linearity can be achieved if transistors are designed to operate in the one-dimensional ballistic transport regime in the quantum capacitance limit, and third order intercept points (IIP3) of around −13dBm at maximum transconductance are reported.
Proceedings ArticleDOI

Performance investigation of III-V heterosturucture underlap double gate MOSFET for System-On-Chip application

TL;DR: In this article, the Analog/Radio Frequency and Linearity analysis of a III-V Heterostructure Underlap Double Gate MOSFET is done using the numerical TCAD device simulator.
References
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Journal ArticleDOI

Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors☆

TL;DR: In this article, the effects of the diffusion current on the three more important low-frequency dynamic characteristics (the short-circuit gate capacitance, the transconductance, and the drain conductance) are discussed.
BookDOI

Compact transistor modelling for circuit design

TL;DR: In this article, the authors describe analytical compact transistor models that can be used in circuit simulation programs like SPICE, including Boltzmann transport equation, continuity equation, Poisson equation, and physical modelling of mobility, recombination, bandgap narrowing, avalanche multiplication and noise.
Journal ArticleDOI

Unified MOSFET model

TL;DR: In this paper, the authors present a basic analytical MOSFET model which describes both the below and above threshold regimes of device operation, based on a charge control model which uses one unified expression for the effective differential channel capacitance.
Book

Ultra large scale integrated microelectronics

TL;DR: In this paper, a book is one of the greatest friends to accompany while in your lonely time and when you have no friends and activities, reading book can be a great choice.
Journal ArticleDOI

A new approach to threshold voltage modelling of short-channel MOSFETS

TL;DR: In this article, a simple analytical model has been developed to predict the threshold voltage on drain bias dependence of an arbitrarily doped short-channel MOSFET based on an analytical solution of the two-dimensional Poisson equation, the potential distribution in the channel depletion region was derived.
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