Journal ArticleDOI
New Superjunction LDMOS Breaking Silicon Limit by Electric Field Modulation of Buffered Step Doping
TLDR
In this article, a step doping buffered layer under the super junction LDMOS was proposed to obtain the low loss for the highvoltage region, which improved the breakdown voltage (BV) and average lateral electric field.Abstract:
A new superjunction LDMOS (SJ-LDMOS) is proposed with the step doping buffered layer under the SJ layer to obtain the low loss for the high-voltage region. The substrate-assisted depletion effect, which results from the p-type substrate for the n-channel SJ-LDMOS, has been eliminated by the step doping buffer layer. By the effect of the electric field modulation, a more uniform lateral electric filed is obtained due to the new high-electric field peaks introduced by the buffered step doping, which improves the breakdown voltage (BV) and average lateral electric field. Using ISE simulation, the BV of proposed SJ-LDMOST is increased by $\sim 50$ % than that of the conventional LDMOS, and improved by $\sim 32$ % than that of buffered SJ-LDMOS. The lateral average electric field is increased to 19 V/ $\mu $ m in the high-voltage region The experimental ${R} _{\mathbf {\mathrm{{\scriptstyle ON}},{\textrm sp}}}$ of the proposed SJ-LDMOS is 241 m $\Omega \,\cdot $ $\mathrm{cm}^{\mathrm {\mathbf {2}}}$ with a BV of 368 V, breaking the silicon limit relationship for ${R} _{\mathrm{{\scriptstyle ON}},\textrm {sp}}$ of 71.8 m $\Omega ~\cdot ~\mathrm{cm}^{\mathrm {\mathbf {2}}}$ with the BV of 242 V in the conventional LDMOS with the same drift region length The merit of BV/ $R _{\mathrm{{\scriptstyle ON}},\textrm {sp}}$ is 15.3 for the proposed SJ-LDMOS compared with that of 3.4 for the conventional LDMOS.read more
Citations
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Journal ArticleDOI
A New Solution for Superjunction Lateral Double Diffused MOSFET by Using Deep Drain Diffusion and Field Plates
Zhi Lin,Xingbi Chen +1 more
TL;DR: In this article, a new solution based on the concept of a deep drain diffusion combined with field plates (FPs) is proposed for the superjunction lateral double diffused MOSFET (SJ-LDMOS) device.
Journal ArticleDOI
Complete 3D-Reduced Surface Field Superjunction Lateral Double-Diffused MOSFET Breaking Silicon Limit
TL;DR: In this paper, a new superjunction lateral double-diffused MOS with the semi-insulating poly silicon (SIPOS SJ-LDMOS) has been proposed, for the first time, with the complete three-dimensional reduced surface field (3D-RESURF).
Journal ArticleDOI
Optimization of Lateral Superjunction Based on the Minimum Specific ON-Resistance
TL;DR: In this article, the authors proposed an optimization methodology of the minimum specific ON-resistance for the lateral superjunction device based on the concepts of charge and potential electric fields.
Journal ArticleDOI
Theoretical Analyses of Complete 3-D Reduced Surface Field LDMOS With Folded-Substrate Breaking Limit of Superjunction LDMOS
TL;DR: A new theory of lateral double-diffused MOS (LDMOS) by the folded-silicon substrate field effect (FSLDMOS) with the complete 3D REduced SURface Field (RESURF) is proposed in this article.
Proceedings ArticleDOI
Non-full depletion mode and its experimental realization of the lateral superjunction
Zhang Wentong,Pu Song,Lai Chunlan,Ye Li,Shikang Cheng,Sen Zhang,Boyong He,Zhuo Wang,Xiaorong Luo,Ming Qiao,Zhaoji Li,Bo Zhang +11 more
TL;DR: In this article, the balanced symmetric lateral superjunction (SJ) satisfying the optimized ES condition is defined as the ES-SJ, which obtains a reduction in R on, sp by 67.8% when compared with other SJ devices under the similar V B.
References
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Journal ArticleDOI
Optimization of the specific on-resistance of the COOLMOS/sup TM/
Xing-Bi Chen,Johnny K. O. Sin +1 more
TL;DR: In this paper, the physical and geometrical parameters of the p- and n-regions used in the voltage-sustaining layer of the COOLMOS/sup TM/ are presented.
Journal ArticleDOI
New thin-film power MOSFETs with a buried oxide double step structure
Baoxing Duan,Bo Zhang,Zhaoji Li +2 more
TL;DR: In this paper, a new silicon-on-insulator (SOI) power MOSFET structure is proposed, in which buried oxide step structure (BOSS) is replaced by a buried oxide double step (BODS).
Journal ArticleDOI
New Superjunction LDMOS With $N$ -Type Charges' Compensation Layer
TL;DR: In this paper, a new superjunction lateral double diffused MOSFET (LDMOST) was designed with an N-type buried layer in the P-substrate near the drain to suppress the effect of substrate-assisted depletion resulting from the imbalance between the pillars of the super junction layer.
Journal ArticleDOI
A new partial SOI power device structure with P-type buried layer
Baoxing Duan,Bo Zhang,Zhaoji Li +2 more
TL;DR: In this paper, a new BPSOI (buried layer partial SOI) structure is developed, in which the P-type buried layer is implanted into the P− substrate by silicon window underneath the source of the conventional PSOI.
Proceedings ArticleDOI
Back-etched super-junction LDMOST on SOI
TL;DR: In this article, a back etched super junction LDMOST (BSJLDMOST) was proposed to overcome the substrate depletion effect by eliminating the silicon substrate under the device, which achieved a threefold improvement in breakdown voltage over conventional super junction diodes.