Reconfiguration-Based VLSI Design for Security

TLDR: This paper presents reconfigurable reversible computing-based cryptography, and a generic reconfiguration-based VLSI design-for-security methodology, and prevents software- or hardware-based code injection attacks based on a SPARC V8 LEON2 processor.

Abstract: Reconfigurable computing is a critical technology for achieving nanoelectronic systems of yield and reliability. In this paper, we present that reconfigurable computing is further a critical technology for achieving hardware security in the presence of supply chain adversaries. Specifically, reconfigurable implementation of a given logic function achieves design obfuscation, while reconfiguration for difference logic functions further achieves moving target defense. We further present reconfigurable reversible computing-based cryptography, and a generic reconfiguration-based VLSI design-for-security methodology. In our case studies based on a SPARC V8 LEON2 processor, we prevent software- or hardware-based code injection attacks at cost of 0.72% area increase, negligible power consumption increase and no performance degradation; we further prevent a hardware Trojan from gaining unauthorized memory access at cost of 4.42% area increase, negligible power consumption increase, and 11.30% critical path delay increase.