Aalborg Universitet
Reduction of DC-link Capacitor in Case of Cascade Multilevel Converters by means of
Reactive Power Control
Gohil, Ghanshyamsinh Vijaysinh; Wang, Huai; Liserre, Marco; Kerekes, Tamas; Teodorescu,
Remus; Blaabjerg, Frede
Published in:
Proceedings of the 29th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2014
DOI (link to publication from Publisher):
10.1109/APEC.2014.6803315
Publication date:
2014
Document Version
Early version, also known as pre-print
Link to publication from Aalborg University
Citation for published version (APA):
Gohil, G. V., Wang, H., Liserre, M., Kerekes, T., Teodorescu, R., & Blaabjerg, F. (2014). Reduction of DC-link
Capacitor in Case of Cascade Multilevel Converters by means of Reactive Power Control. In Proceedings of the
29th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2014 (pp. 231-238 ). IEEE
Press. I E E E Applied Power Electronics Conference and Exposition. Conference Proceedings
https://doi.org/10.1109/APEC.2014.6803315
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Reduction of DC-link Capacitor in Case of Cascade
Multilevel Converters by means of Reactive Power
Control
Ghanshyamsinh Gohil, Huai Wang, Marco Liserre, Tamas Kerekes, Remus Teodorescu, Frede Blaabjerg
Department of Energy Technology
Aalborg University, Denmark
gvg@et.aau.dk, hba@et.aau.dk, mli@et.aau.dk, tak@et.aau.dk, ret@et.aau.dk, fbl@et.aau.dk
Abstract—A new method to selectively control the amount of
dc-link voltage ripple by processing the desired reactive power by
a DC/DC converter in an isolated AC/DC or AC/DC/AC system is
proposed. The concept can reduce the dc-link capacitors used for
balancing the input and output power and thereby limiting the
voltage ripple. It allows the use of a smaller dc-link capacitor and
hence a longer lifetime and at the same time high power density
and low cost can be achieved. The isolated DC/DC converter is
controlled to process the desired reactive power in addition to the
active power. The control system to achieve this selective degree
of compensation is proposed and verified by Simulations.
I. INTRODUCTION
AC/DC/AC conversion systems with a Medium Frequency
(MF) transformer is proposed for many applications, such
as Solid State Transformer (SST) [1]–[3], adjustable speed
Medium Voltage (MV) motor drives [4], and back-to-back
connection of MV networks [5]. The transformer size
reduction due to MF operation makes it attractive for
offshore applications, such as wind farm integration, and
oil & gas exploration platforms [6]. The inverter stage
can be omitted in applications where the dc power can be
directly utilized. Traction power electronics transformer [7],
[8], power converter to integrate wind generator to multi-
terminal dc collection network are few such examples. The
basic block diagram of such an MF system is shown in Fig. 1.
Fig. 1. Basic block diagram of isolated AC/DC/AC system using a medium
frequency transformer.
Due to the limited voltage handling capability of the state
of the art silicon based IGBTs, the use of multilevel converter
structure is inevitable. Cascade Multilevel Converter (CMC)
is often employed due to its simple structure [9], scalability
[10], and low cost [11] compared to other multilevel converter
topologies. Because of the inherent single phase structure
of CMC, the double frequency component of AC power on
MV dc-link is unavoidable in both single phase and three
phase applications [12]. If a single phase converter is used
on the Low Voltage (LV) side, the same phenomenon will be
observed on the LV dc-link as well. Often large capacitors
are used to guarantee small ripple voltage on the dc-link, and
to avoid interactions with the control loop, which otherwise
will deteriorate the quality of AC current waveforms if a
suitable control is not implemented [13]. With more stringent
reliability constrains, the design of dc links encounters the
following challenges: a) capacitors are one kind of the stand-
out components in terms of failure rate [14], [15]; b) cost
reduction pressure from global competition dictates minimum
design margin of capacitors without undue risk; c) capacitors
are to be exposed to more harsh environments (e.g. high
ambient temperature, high humidity, etc.) in emerging appli-
cations, and d) constrains on volume and thermal dissipation
of capacitors with the trends for high power density power
electronic systems [16].
A capacitor size reduction technique in AC/DC/AC system
with the equal supply and load frequency has been studied in
[17], [18]. Input and output AC powers are synchronized to
reduce the dc-link power, thus capacitor size reduction can be
achieved. A six switch solution for non-isolated AC/DC/AC
system is proposed in [13], where the phase difference between
the inverter and rectifier modulation waveforms is varied.
A similar approach of power synchronization in isolated
AC/DC/AC system for single phase SST application is fol-
lowed in [19], [20]. The isolated DC/DC converter is used for
processing the reactive power. A Dual Active Bridge (DAB)
feed forward power ripple control method is used in [19]
and a proportional integral resonant controller is employed to
obtain closed loop control [20]. However, there are many three
phase application which uses single phase structure (CMC)
and gives either dc or three phase AC output. The capacitor
size reduction issue is such a system is addressed in this paper.
This paper proposes a technique to selectively control
the reactive power processed by the DC/DC converter, and
therefore the dc-link voltage ripple. The single phase and
three phase system considered for the study are depicted in
Fig. 2 and Fig. 3, respectively. Earlier studies [19], [20] on
capacitor size reduction in single phase systems focus only on
the control techniques. However, the effect of reactive power
processing by the DC/DC converter stage on the converter
efficiency and design requirements are not addressed. The
system overview and modulation of DAB is discussed in
Section II. In Section III, capacitor size reduction technique
is presented. A detailed analysis on losses and component
stresses is given in Section IV. Simulation results are finally
presented in Section V followed by a conclusion.
II. S
YSTEM OVERVIEW
Fig. 2 shows the system configuration of one of the possible
power electronics interface of a single phase MV AC network
to LV AC network. A CMC is used as a MV-side converter
and it consists of several H-bridge cells connected in cascade.
The number of levels in CMC depends on the MV-side voltage
level and the voltage handling capability of the semiconductor
device used. A bidirectional DC/DC converter is connected
to individual dc links of the CMC to facilitate bi-directional
power flow. A MF transformer is used to provide galvanic iso-
lation, and it aids to achieve the desired voltage transformation.
DAB is often employed because of its symmetrical structure
and it offers simpler control for seamless power transfer in
both directions. High power density can be achieved using
Dual Active Bridge (DAB) [4], [21]. Requirement of very
few passive components and soft switching properties are the
major advantages offered by DAB. Also depending upon the
dc gain of the converter, Zero Voltage Switching (ZVS) can be
achieved over a wide load range. This is an important feature
as high voltage semiconductor devices are used on MV-side
of DAB. The outputs of DABs are connected in parallel to
utilize the advantages of interleaving. A single phase DC/AC
converter is used to feed the LV AC loads.
Fig. 3 depicts the three phase isolated AC/DC/AC system.
The rectifier uses the same CMC structure as that of the single
phase system. The outputs of the DABs from each phase
groups are connected in parallel to form a LV dc-link. A three
phase inverter is used to provide the desired three phase AC
voltages at the LV AC side. The inverter stage can be omitted
in applications where the dc power can be directly utilized.
Fig. 2. Single phase isolated AC/DC/AC system with reactive power transfer.
Fig. 3. Three phase isolated AC/DC/AC system with reactive power transfer.
A. Dual active bridge
The circuit configuration of a DAB is shown in Fig. 4. It
consists of two H bridges, a MF transformer and an inductor.
Depending on the value of the inductance required, the possi-
bility of integrating the inductance into the transformer exists
[22]. In its simplest form of operation, both H-bridges are
operated with 50% duty ratio and voltages are phase displaced
by an angle δ. This scheme is known as phase shift modulation
and the value of δ along with inductance value, switching
frequency and voltages; determine the amount and direction
of power transfer. Let the dc voltage gain be:
Kv
dc
=
n ∗ V
dcLV
V
dcMV
(1)
where, n is transformer turns ratio, V
dcLV
is voltage at LV dc-
link and V
dcMV
is MV dc-link voltage output at each CMC
module. For Kv
dc
=1, ZVS over the whole power range
Fig. 4. Dual active bridge (DAB).
can be achieved. This is an important feature, especially in
applications where high voltage semiconductor devices are
used and both input and output voltages of the DAB are tightly
controlled. Generally the turn-on and turn-off energy of the
device for a given current rating increases with increase in
voltage rating and if the device is hard switched, the switching
loss is substantial. Appropriate transformer turns ratio can be
chosen to achieve ZVS over a wide load range. However using
the conventional phase shift modulation scheme with a given n
to achieve ZVS over wider load range, it may result into high
transformer current, and also capacitor RMS current increases.
This could decrease the efficiency.
Considerable transformer current reduction is achieved us-
ing triangular current mode modulation [23], [24]. The power
transfer depends on the effective voltage difference of both
bridges and hence it suffers from limited power transfer
capacity in such scheme. Trapezoidal modulation scheme is
proposed [23], [24] to improve the power transfer capacity.
The efficiency can be improved by adopting an optimum
modulation scheme for expanding the soft switching range
[25] or to reduce the conduction loss [26]. However, the
schemes are beyond the scope of this paper and the discussion
is mainly focused on the use of single PWM control [25], also
popularly known as D1 and δ control.
į
į
ʌ
Fig. 5. DAB inductor current and MF transformer primary and secondary
voltages.
B. Dual Active Bridge Modulation
The transformer voltages and inductor current for a D1
and δ control are shown in Fig. 5. The power transfer from
MV-side to LV-side is considered for discussion and the same
analysis would apply for reverse direction of power flow as
well. Considering a loss less system, the power transfer P
dab
for a given δ is given by:
P
dab
=
nV
dcLV
V
dcMV
δ
X
L
(
π −|δ|
π
) −
nV
dcLV
V
dcMV
δ
X
L
|δ|
(
d
2
4π
)
(2)
For
d
2
<δ<π. Where, X
L
=2πf
s
L
eq
, f
s
is the switching
frequency, L
eq
is the equivalent inductance, d is the free-
wheeling period. The first term in (2) is the same as the
power flow in DAB when a phase shift modulation is used.
The maximum power transfer is:
P
dab,max
=
nV
dcLV
V
dcMV
4πX
L
(π
2
− δ
2
),forδ = π/2 (3)
From (2), the phase shift required for transferring given power
is:
δ =
π
2
[1 −
1 − (
8P
dab
f
s
L
eq
nV
dcLV
V
dcMV
+
d
2
π
2
)] (4)
The inequalities due to manufacturing tolerances result into the
flow of a dc bias current in a MF transformer. This leads to a dc
offset in the flux density swing and cumulative effect can drive
the magnetic core into saturation region. This could lead to
more losses into both semiconductor devices and transformer
core. Air gapped cores [27] can be used at the expense of
additional losses. A magnetic transducer [28] can also be
used to correct the dc bias current. A current mode control
is traditionally used to avoid dc bias in push-pull and full
bridge dc-dc converters and further extended for DAB control
in this paper. Phase angle information from (4) is translated
into current domain (see Fig. 5), and it is given as:
I
L
(δ)=
1
2X
L
[(nV
dcLV
− V
dcMV
)π +2V
dcMV
δ] (5)
I
L
(π −
d
2
)=
1
2X
L
[(nV
dcLV
− V
dcMV
)π +2V
dcLV
δ
−(V
dcMV
− nV
dcLV
)d]
(6)
The transformer current is alternating in the DAB. Positive
and negative current wave-shape can be made similar by
updating the reference current value once in each switching
period T
s
. The I
L
(δ) is used to obtain the required phase
shift to cater the power demand and I
L
(π −
d
2
) is controlled
to ensure volt-sec balance. This can avoid core saturation and
ensures effective utilization of the magnetic core.
III. C
APACITOR VOLTAGE RIPPLE AND IT’S REDUCTION
TECHNIQUE
Considering a balanced three phase system, analysis for one
phase is presented and then extended to three phase system.
Assuming that the CMC rectifier is switched at sufficiently
higher frequency and the filter is designed to make the
harmonic content in the grid current to be zero. Then the grid
voltage and the rectifier current are given as
√
2V
a
sin ωt and
√
2I
a
sin(ωt−φ), respectively. A φ is the power factor angle.
The input power of A phase is given by:
P
in
(t)=V
a
I
a
cos φ − V
a
I
a
cos(2ωt −φ) (7)
Assuming zero losses in the filter inductor, the reactive power
contribution of the filter is:
P
Lf
(t)=I
2
a
ωL
f
sin(2ωt −2φ) (8)
The MV dc-link voltage is controlled by CMC rectifier and the
task of maintaining a stable LV dc-link is assigned to DAB.
Assuming a lossless system, the power balance is maintained
by making the power flow through DAB the same as the active
power processed by the rectifier. This implies:
V
a
I
a
cos φ = NP
dabactiv e
(t) (9)
where, N is the number of cascade connected modules and
P
dabactiv e
is the power flowing through DAB.
The reactive power circulates through the MV dc-link
capacitor. This causes a ripple in dc-link voltage. The capacitor
voltage is composed of a dc value overlapped by an AC
component. The AC component frequency is nearly twice that
of the supply frequency. This double frequency component of
reactive power demands, larger capacitor to restrict the ripple
within allowable limit.
Let the DAB designed and controlled to process desired
Į
Ȧ
Ȧ
į
ʌ
Fig. 6. Proposed control scheme for selective reactive power transfer through DAB
amount of input reactive power in addition to the input active
power, and the power flowing through the DAB is:
P
dab
(t)=P
dabactiv e
(t)+P
dabreactive
(t) (10)
Where, P
dabreactive
is the desired fraction of the rectifier
reactive power of one module. Due to the multi-level voltage
waveforms, a small filter is required in CMC to meet the
current THD requirement. It implies that I
a
ωL
f
and the
reactive power consumption of the filter inductor can be
neglected. This gives;
P
dabreactive
(t)=−α
c
V
a
I
a
N
cos(2ωt −φ) (11)
where, α
c
is a compensation factor and can be selectively
chosen for desired dc-link voltage ripple cancellation. Using
power balance in steady state, the oscillating power in MV
dc-link capacitor is given as:
˜
P
cmv
(t)=(α
c
− 1)
V
a
I
a
N
cos(2ωt −φ) (12)
The double frequency component of the power
stores/withdraws energy during a quarter cycle of the
fundamental frequency and from (12), the capacitance
required to maintain the desired ripple in the the MV dc
voltage is given as:
C
mv
=
(1 − α
c
)V
a
I
a
ωNV
dcmv
ΔV
dcmv
(13)
where, V
dcmv
is the MV dc-link voltage and ΔV
dcmv
is peak
to peak ripple voltage. From (13), it is apparent that the
capacitance required to maintain a voltage ripple in a desirable
limit reduces as α
c
increases. In a three phase system, the
power output at the DAB terminals is;
P
dab
a
(t)=
V
a
I
a
N
cos φ − α
c
V
a
I
a
N
cos(2ωt −φ)
P
dab
b
(t)=
V
b
I
b
N
cos φ − α
c
V
b
I
b
N
cos(2ωt +
2π
3
− φ)
P
dab
c
(t)=
V
c
I
c
N
cos φ − α
c
V
c
I
c
N
cos(2ωt −
2π
3
− φ)
(14)
In balance three phase system, the reactive power flowing
through DAB of from each phase group will have an equal
magnitude and phase displacement of 120
◦
of double fre-
quency. The output are connected to a common dc-link at
LV-side as shown in Fig. 3 and addition of reactive power
becomes zero. Therefore, the ripple on MV dc-link can be
canceled with a negligible effect on the voltage ripple at LV
dc-link.
IV. C
ONTROL SYSTEM AND DESIGN IMPLICATIONS
The desired MV dc-link voltage ripple reduction can be
achieved by precisely controlling the DAB reactive power.
From (11), the reactive power component processed by the
DAB can be rewritten as:
P
dabreactive
(t)=−α
c
V
a
I
a
cos φ
N
[cos 2ωt +sin2ωt tan φ]
(15)
Fig. 6 depicts the block diagram of the proposed control
system. The LV dc-link voltage is sensed and compared
with the reference value. The error is passed through a PI
controller, and the output is the power required to maintain the
power balance at LV dc-link. As all three phases contributes
to the power at LV dc-link, the power command for the
individual DAB is one third of the total power required. The
compensation factor can be chosen based on the application
and availability of the devices. The choice of compensation
factor also affects the selection of semiconductor devices,
transformer core size, efficiency, and reliability of the system.
The input reactive power that is required to be processed by
DAB is calculated using (15). The sin 2ωt and cos 2ωt are
obtained for each phase from the rectifier phase locked loop.
The power factor angle is known to the controller and hence
tan φ can be easily obtained. The D1 and δ control is used
and with Kv
dc
< 1, the freewheeling period is introduced on
MV-side waveforms. The freewheeling period d is chosen to
be equal to π(1 − Kv
dc
) for maximizing the ZVS range as
demonstrated in [25]. Current mode control is used to generate
PWM and I
L
(δ) is used to obtain the required phase shift to
cater the power demand.
In order to facilitate the dc-link capacitor reduction, the
DAB should be designed to allow additional power flow
through it. In normal operation(without compensation), only
