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Journal ArticleDOI

The Deposition of Silicon Dioxide Films at Reduced Pressure

A. C. Adams, +1 more
- 01 Jun 1979 - 
- Vol. 126, Iss: 6, pp 1042-1046
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TLDR
In this article, the authors used tetraethoxysilane (TEOS) to decompose a silicon dioxide film at 700°-750°C in a reduced pressure CVD reactor.
Abstract
Films of silicon dioxide have been deposited on silicon substrates by decomposing tetraethoxysilane (TEOS) at 700°–750°C in a reduced pressure CVD reactor. The deposition rate is 200–300 A/min. The thickness uniformity is better than ±1% over a deposition zone capable of holding 100 wafers. The step coverage is conformal, the defect density is very low, and the film stress is compressive and low. The refractive index, infrared spectrum, and film density appear normal for deposited silicon dioxide. The addition of phosphorus compounds causes the deposition rate to increase and the thickness uniformity to degrade. Consequently, this reaction is not suitable for depositing phosphorus‐doped films for integrated circuit applications; however, this reaction appears to be a very good process for depositing undoped films of silicon dioxide.

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Low dielectric constant materials.

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TL;DR: In this article, the authors present the present knowledge on tantalum pentoxide (Ta 2 O 5 ) thin films and their applications in the field of microelectronics and integrated microtechnologies.
Journal ArticleDOI

Characterization of defects in Si and SiO2−Si using positrons

TL;DR: In this article, the positron annihilation spectroscopy (PAS) was used as a non-destructive probe to examine defects in technologically important Si-based structures, including the quality of overlayers, formation and annealing of defects after ion implantation, identification of defect complexes, and evaluation of the distribution of internal electric fields.
Patent

Fabricating a semiconductor device with low defect density oxide

TL;DR: In this paper, low defect density oxides suitable for use as thin gate oxides or in charge storage capacitors are described, where the first and second layers are formed on a substrate with misaligned defect structures.
Patent

Chamber liner for high temperature processing chamber

TL;DR: In this article, an apparatus for fabricating an integrated circuit device comprises an enclosure housing a processing chamber and having a gas inlet for receiving process gases into the processing chamber, and a gas outlet for discharging the process gases.
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