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Towards a new generation of pixel detector readout chips
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2016 JINST 11 C01007
(http://iopscience.iop.org/1748-0221/11/01/C01007)
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2016 JINST 11 C01007
Published by IOP Publishing for Sissa Medialab
Received: October 6, 2015
Accepted: November 17, 2015
Published: January 8, 2016
17
th
International Workshop on Radiation Imaging Detectors
28 June – 2 July 2015,
DESY, Hamburg, Germany
Towards a new generation of pixel detector readout chips
M. Campbell,
a, 1
J. Alozy,
a
R. Ballabriga,
a
E. Frojdh,
a, b
E. Heijne,
a, c
X. Llopart,
a
T. Poikela,
a
L. Tlustos,
a, d
P. Valerio
a
and W. Wong
a, e
a
CERN,
1211 Geneva 23, Switzerland
b
Mid Sweden University,
Sundsvall, Sweden
c
Czech Technical University in Prague, Institute of Experimental and Applied Physics IEAP,
Czech Republic
d
University of Freiburg,
Freiburg, Germany
e
University of Houston,
Houston, U.S.A.
E-mail: michael.campbell@cern.ch
Abstract: The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging
and in single particle detection and tracking. This paper will review briefly the performance and
limitations of the present generation of pixel detector readout chips developed by the Collaboration.
Through Silicon Via technology has the potential to provide a significant improvement in the tile-
ability and more flexibility in the choice of readout architecture. This has been explored in the
context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation
of chips will aim to provide improved spectroscopic imaging performance at rates compatible with
human CT. It will also aim to provide full spectroscopic images with unprecedented energy and
spatial resolution. Some of the opportunities and challenges posed by moving to a more dense
CMOS process will be discussed.
Keywords: Solid state detectors; Hybrid detectors; Electronic detector readout concepts (solid-
state)
1Corresponding author.
© CERN 2016, published under the terms of the Creative Commons Attribution 3.0
License by IOP Publishing Ltd and Sissa Medialab srl. Any further distribution of this
work must maintain attribution to the author(s) and the published article’s title, journal citation and DOI.
doi:10.1088/1748-0221/11/01/C01007
2016 JINST 11 C01007
Contents
1 Introduction 1
2 Some highlights from the Medipix3 and Timepix3 ASIC’s 1
3 Tiling larger areas using Through Silicon Vias 4
4 Medipix4 and Timepix4 7
5 Conclusions 8
1 Introduction
The Medipix3 Collaboration has undertaken two major ASIC developments since its creation in
2005. The Medipix3 readout chip aims at spectroscopic X-ray imaging at relatively high X-ray
fluxes. In order to mitigate the degradation of energy resolution by charge sharing between pixels
a novel charge summing and allocation scheme is implemented permitting neighbouring pixels to
communicate on an event-by-event basis and allocate each hit with its total deposited energy to one
pixel only. The Timepix3 chip, on the other hand, aims to send continuously as much information
as possible off chip for data processing. For both chips the peripheral circuitry has been kept to a
strict minimum to reduce the dead area in case large surfaces have to be covered. Both chips are
also “Through Silicon Via (TSV) ready”, that is to say that the design of the wire bonding pads is
such that they can be accessed from the rear of the chip for TSV processing. TSV’s on the IO pads
obviate the need for wire bonds further diminishing the required dead area between chips on a large
surface.
This paper highlights recent results obtained using the Medipix3 and Timepix3 chips. It also
describes in some detail the results of the TSV processing of wafers composed of these chips. These
are so promising that we feel confident to propose new chip architectures which will make full use
of TSV’s. The basic features of the next generation of chips are outlined.
2 Some highlights from the Medipix3 and Timepix3 ASIC’s
The various iterations of the Medipix3 chip are already described in detail in the literature [1–3].
A short reminder of the functionality is provided here for completeness. The chip is composed of
a matrix of 256 × 256 pixels on a pitch of 55 µm. Following the amplification and discrimination
process which takes place within each pixel, inter-pixel logic ensures that simultaneous hits in a
local region are allocated to one single pixel only (the pixel with the largest charge). While this
process is taking place summing circuits at the four pixel corners add up the charge in each 2 × 2
pixel cluster. It is the corner sum with the highest charge in the allocated pixel which determines the
– 1 –
2016 JINST 11 C01007
Figure 1. Line pair mask images for the Medipix3RX chip connected to a 300 µm thick Si sensor in single
pixel mode (left) and charge summing mode (right) [3].
Figure 2. Threshold scans of the Medipix3RX chip connected to a 300 µm thick Si sensor in single pixel
mode (SPM) and Charge summing mode (CSM). CSM results in the suppression of the charge sharing tail
at the expense of a slightly degraded energy resolution [4].
attribution of a hit to a given energy bin. This process works both at a sensor pixel pitch of 55 µm
and 110 µm (whereby only one in 4 corresponding readout pixels is connected to the sensor and each
large pixel uses the circuitry of the four 55 µm pixels). Figure 1 [3], which shows line pair mask
images for a 55 µm pitch and 300 µm thick Si sensor, proves that the spatial resolution of the system
is identical for images taken with the charge summing and allocation scheme switched on or off.
Figure 2 [4] shows threshold scans for a similar detector when exposed to a monochromatic beam of
10 keV X-rays. These are generated by plotting the total number of hits in the full chip at different
threshold levels and then differentiating the curve with respect to threshold. While the energy
resolution in the photo peak in charge summing mode is degraded with respect to single pixel mode
– 2 –
2016 JINST 11 C01007
Figure 3. Threshold scans of the Medipix3RX chip connected to a 2 mm thick CdTe sensor at a sensor pixel
pitch of 110 µm in single pixel mode (SPM) and charge summing mode (CSM) [5].
the suppression of the charge sharing tail is evident. The impact of the charge summing scheme is
even more pronounced for a 2mm thick CdTe detector with a pixel pitch of 110 µm exposed to an
241
Am source, see figure 3 [5]. When charge summing and allocation is switched off the energy
information is almost completely lost because of charge sharing (due to both fluorescence during
charge deposition and diffusion during charge collection) but when charge summing is switched
on spectroscopic information becomes again visible. However, a degradation in the dead time of a
factor of about 4 has been measured with charge summing and allocation active [5].
The Timepix3 chip [6] takes an approach to signal treatment which is almost orthogonal to
the Medipix3 approach; in this case each pixel sends as much information as possible off chip as
soon as a hit is detected. Pixel coordinates, Time over Threshold (ToT) and particle arrival time
(ToA, measured to a precision of 1.56 ns) are sent off chip. The maximum flux which can be read
out correctly is 80Mhits/sec per chip. A global shutter is used to stop or activate detection but, as
long as the shutter is open, data is continuously driven off chip as soon as it is generated. Using
this mode spectroscopic X-ray imaging is also possible [7], but at a significantly lower flux than
that permitted by Medipix3. On the other hand, much more information is available for analysis
as the time stamp permits off-line clustering and the number of energy bins used can be chosen a
posteriori according to the needs of the application. Moreover, there are many other applications
which can take advantage of the data driven architecture and the precise time stamp. For example,
if a charged particle crosses more than one pixel at a grazing angle the drift time of the generated
charge will be slightly different from pixel to pixel. After careful calibration for timewalk it is
possible to reconstruct the charged track effectively providing a vector from a single semiconductor
layer. (Of course, it is impossible to determine the arrow of the vector as the charge is deposited at
the speed of light.) An example of this is shown in figure 4 where the measured ToT and arrival
time (normalised to the hit on the sensor pixel nearest to the readout chip) are plotted for a cosmic
particle crossing the sensor at a high incident angle. In figure 5 [7] the reconstructed track is shown
where the diffusion of the drifted charge is evident.
– 3 –